[PATCH] D27562: CodeGen: Assert that liveness is up to date when reading block live-ins.

[Matthias Braun via Phabricator via llvm-commits]

MatzeB retitled this revision from "CodeGen: Do not compute liveins when trackLivenessAfterRegalloc() is false" to "CodeGen: Assert that liveness is up to date when reading block live-ins.".
MatzeB updated the summary for this revision.
MatzeB updated this revision to Diff 80935.
MatzeB added a comment.

Turns out not computing live-in lists when trackLivenessAfterRegAlloc() is too aggressive for todays LLVM (for example MachineLICM which is setup as part of TargetPassConfig::addOptimizedRegAlloc() requires up-to-date live-in lists.

In any case adding an assert when querying the live-in list should avoid bad usage.

I updated the patch accordingly.


Repository:
  rL LLVM

https://reviews.llvm.org/D27562

Files:
  include/llvm/CodeGen/MachineBasicBlock.h
  lib/CodeGen/IfConversion.cpp
  lib/CodeGen/MIRPrinter.cpp
  lib/CodeGen/MachineBasicBlock.cpp
  lib/CodeGen/MachineVerifier.cpp
  lib/CodeGen/RegisterScavenging.cpp
  lib/CodeGen/VirtRegMap.cpp
  test/CodeGen/AArch64/machine-scheduler.mir
  test/CodeGen/MIR/X86/basic-block-liveins.mir
  test/CodeGen/MIR/X86/machine-verifier.mir
  test/CodeGen/X86/tail-call-conditional.mir

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