[llvm] r288916 - [SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes

[Daniel Jasper via llvm-commits]

I have reverted this for now in r289194. It is causing llvm.org/PR31323.

On Wed, Dec 7, 2016 at 5:28 PM, Simon Pilgrim via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: rksimon
> Date: Wed Dec  7 10:28:21 2016
> New Revision: 288916
>
> URL: http://llvm.org/viewvc/llvm-project?rev=288916&view=rev
> Log:
> [SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes
>
> Modified:
>     llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>     llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/
> CodeGen/SelectionDAG/SelectionDAG.cpp?rev=288916&
> r1=288915&r2=288916&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Dec  7
> 10:28:21 2016
> @@ -2590,6 +2590,42 @@ void SelectionDAG::computeKnownBits(SDVa
>      }
>      break;
>    }
> +  case ISD::INSERT_VECTOR_ELT: {
> +    SDValue InVec = Op.getOperand(0);
> +    SDValue InVal = Op.getOperand(1);
> +    SDValue EltNo = Op.getOperand(2);
> +
> +    ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
> +    if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
> +      // If we know the element index, split the demand between the
> +      // source vector and the inserted element.
> +      KnownZero = KnownOne = APInt::getAllOnesValue(BitWidth);
> +      unsigned EltIdx = CEltNo->getZExtValue();
> +
> +      // If we demand the inserted element then add its common known bits.
> +      if (DemandedElts[EltIdx]) {
> +        computeKnownBits(InVal, KnownZero2, KnownOne2, Depth + 1);
> +        KnownOne &= KnownOne2.zextOrTrunc(KnownOne.getBitWidth());
> +        KnownZero &= KnownZero2.zextOrTrunc(KnownZero.getBitWidth());;
> +      }
> +
> +      // If we demand the source vector then add its common known bits,
> ensuring
> +      // that we don't demand the inserted element.
> +      APInt VectorElts = DemandedElts & ~(APInt::getOneBitSet(NumElts,
> EltIdx));
> +      if (!!VectorElts) {
> +        computeKnownBits(InVec, KnownZero2, KnownOne2, VectorElts, Depth
> + 1);
> +        KnownOne &= KnownOne2;
> +        KnownZero &= KnownZero2;
> +      }
> +    } else {
> +      // Unknown element index, so ignore DemandedElts and demand them
> all.
> +      computeKnownBits(InVec, KnownZero, KnownOne, Depth + 1);
> +      computeKnownBits(InVal, KnownZero2, KnownOne2, Depth + 1);
> +      KnownOne &= KnownOne2.zextOrTrunc(KnownOne.getBitWidth());
> +      KnownZero &= KnownZero2.zextOrTrunc(KnownZero.getBitWidth());;
> +    }
> +    break;
> +  }
>    case ISD::BSWAP: {
>      computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2,
> DemandedElts,
>                       Depth + 1);
>
> Modified: llvm/trunk/test/CodeGen/X86/known-bits-vector.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/X86/known-bits-vector.ll?rev=288916&r1=288915&r2=288916&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/X86/known-bits-vector.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/known-bits-vector.ll Wed Dec  7 10:28:21
> 2016
> @@ -58,11 +58,7 @@ define <4 x float> @knownbits_insert_uit
>  ; X32-NEXT:    vpinsrd $0, %eax, %xmm0, %xmm0
>  ; X32-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
>  ; X32-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2]
> -; X32-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],
> xmm0[4],mem[5],xmm0[6],mem[7]
> -; X32-NEXT:    vpsrld $16, %xmm0, %xmm0
> -; X32-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],
> xmm0[4],mem[5],xmm0[6],mem[7]
> -; X32-NEXT:    vaddps {{\.LCPI.*}}, %xmm0, %xmm0
> -; X32-NEXT:    vaddps %xmm0, %xmm1, %xmm0
> +; X32-NEXT:    vcvtdq2ps %xmm0, %xmm0
>  ; X32-NEXT:    retl
>  ;
>  ; X64-LABEL: knownbits_insert_uitofp:
> @@ -72,11 +68,7 @@ define <4 x float> @knownbits_insert_uit
>  ; X64-NEXT:    vpinsrd $0, %eax, %xmm0, %xmm0
>  ; X64-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
>  ; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2]
> -; X64-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],
> xmm0[4],mem[5],xmm0[6],mem[7]
> -; X64-NEXT:    vpsrld $16, %xmm0, %xmm0
> -; X64-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],
> xmm0[4],mem[5],xmm0[6],mem[7]
> -; X64-NEXT:    vaddps {{.*}}(%rip), %xmm0, %xmm0
> -; X64-NEXT:    vaddps %xmm0, %xmm1, %xmm0
> +; X64-NEXT:    vcvtdq2ps %xmm0, %xmm0
>  ; X64-NEXT:    retq
>    %1 = zext i16 %a1 to i32
>    %2 = zext i16 %a2 to i32
>
>
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