[lld] r288670 - ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask

Adhemerval Zanella via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 5 06:15:44 PST 2016


Author: azanella
Date: Mon Dec  5 08:15:44 2016
New Revision: 288670

URL: http://llvm.org/viewvc/llvm-project?rev=288670&view=rev
Log:
ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask

The relocation R_AARCH64_LDST16_ABS_LO12_NC should set a ld/st
immediate value to bits [11:1] not [11:2].  This patches fixes it
and adds a testcase for regression.

With this fix all the faulty tests on test-suite (clavm, lencod,
and trimaran) pass.

Modified:
    lld/trunk/ELF/Target.cpp
    lld/trunk/test/ELF/aarch64-relocs.s

Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=288670&r1=288669&r2=288670&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Mon Dec  5 08:15:44 2016
@@ -1381,7 +1381,7 @@ void AArch64TargetInfo::relocateOne(uint
     or32le(Loc, (Val & 0x0FF8) << 6);
     break;
   case R_AARCH64_LDST16_ABS_LO12_NC:
-    or32le(Loc, (Val & 0x0FFC) << 9);
+    or32le(Loc, (Val & 0x0FFE) << 9);
     break;
   case R_AARCH64_LDST8_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFFF) << 10);

Modified: lld/trunk/test/ELF/aarch64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-relocs.s?rev=288670&r1=288669&r2=288670&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-relocs.s (original)
+++ lld/trunk/test/ELF/aarch64-relocs.s Mon Dec  5 08:15:44 2016
@@ -141,16 +141,20 @@ foo128:
 .section .R_AARCH64_LDST16_ABS_LO12_NC,"ax", at progbits
 ldst16:
   ldr h17, [x19, :lo12:foo16]
+  ldrh w1, [x19, :lo12:foo16]
+  ldrh w2, [x19, :lo12:foo16 + 2]
 foo16:
   .asciz "foo"
-  .size mystr, 3
+  .size mystr, 4
 
 # S = 0x20054, A = 0x4
 # R = ((S + A) & 0x0FFC) << 9 = 0xb000
 # 0xb000 | 0x7d400271 = 0x7d40b271
 # CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
 # CHECK-NEXT: ldst16:
-# CHECK-NEXT:   20054:       71 b2 40 7d     ldr     h17, [x19, #88]
+# CHECK-NEXT:   20054:       71 c2 40 7d     ldr     h17, [x19, #96]
+# CHECK-NEXT:   20058:       61 c2 40 79     ldrh    w1, [x19, #96]
+# CHECK-NEXT:   2005c:       62 c6 40 79     ldrh    w2, [x19, #98]
 
 .section .R_AARCH64_MOVW_UABS,"ax", at progbits
 movz1:




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