[PATCH] D27395: Fixed store operation for a vector of i1.

Elena Demikhovsky via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 4 10:59:32 PST 2016


delena created this revision.
delena added reviewers: spatel, RKSimon, igorb.
delena added a subscriber: llvm-commits.
delena set the repository for this revision to rL LLVM.

It is not target specific. Store of <4 x i1 > was implemented incorrectly, it should write into 4 bytes.


Repository:
  rL LLVM

https://reviews.llvm.org/D27395

Files:
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/X86/vec-trunc-store.ll


Index: test/CodeGen/X86/vec-trunc-store.ll
===================================================================
--- test/CodeGen/X86/vec-trunc-store.ll
+++ test/CodeGen/X86/vec-trunc-store.ll
@@ -32,3 +32,26 @@
   store <4 x i16> %cti44, <4 x i16>* undef
   ret void
 }
+
+define void @store_vec_i1(<4 x i1>* %p, <4 x i1> %val) {
+; CHECK-LABEL: store_vec_i1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movd %xmm0, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    movb %al, (%rdi)
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; CHECK-NEXT:    movd %xmm1, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    movb %al, 3(%rdi)
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
+; CHECK-NEXT:    movd %xmm1, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    movb %al, 2(%rdi)
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; CHECK-NEXT:    movd %xmm0, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    movb %al, 1(%rdi)
+; CHECK-NEXT:    retq
+  store <4 x i1> %val, <4 x i1>* %p
+  ret void;
+}
Index: lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3295,6 +3295,7 @@
 
   // Store Stride in bytes
   unsigned Stride = MemSclVT.getSizeInBits() / 8;
+  Stride = (Stride == 0) ? 1 : Stride; // Stride can't be less than 1 byte.
   EVT IdxVT = getVectorIdxTy(DAG.getDataLayout());
   unsigned NumElem = StVT.getVectorNumElements();
 


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