[PATCH] D27339: [globalisel][aarch64] Make getCopyMapping() take register banks ID's rather than IsGPR booleans

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
dsanders added reviewers: ab, qcolombet, t.p.northover.
dsanders added a subscriber: llvm-commits.
dsanders added a dependency: D27338: [globalisel] Tablegen-erate current Register Bank Information.
Herald added subscribers: rovka, dberris, vkalintiris, rengolin, aemerson.

This allows the function to handle architectures with more than two register banks.

Depends on https://reviews.llvm.org/D27338


https://reviews.llvm.org/D27339

Files:
  lib/Target/AArch64/AArch64GenRegisterBankInfo.def
  lib/Target/AArch64/AArch64RegisterBankInfo.cpp


Index: lib/Target/AArch64/AArch64RegisterBankInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64RegisterBankInfo.cpp
+++ lib/Target/AArch64/AArch64RegisterBankInfo.cpp
@@ -117,8 +117,7 @@
     (void) PartialMapDstIdx;                                                   \
     (void) PartialMapSrcIdx;                                                   \
     const ValueMapping *Map = AArch64::getCopyMapping(                         \
-        AArch64::First##RBNameDst == AArch64::FirstGPR,                        \
-        AArch64::First##RBNameSrc == AArch64::FirstGPR, Size);                 \
+        AArch64::RBNameDst##RegBankID, AArch64::RBNameSrc##RegBankID, Size);   \
     (void) Map;                                                                \
     assert(Map[0].BreakDown == &AArch64::PartMappings[PartialMapDstIdx] &&     \
            Map[0].NumBreakDowns == 1 && #RBNameDst #Size                       \
@@ -244,21 +243,25 @@
     InstructionMappings AltMappings;
     InstructionMapping GPRMapping(
         /*ID*/ 1, /*Cost*/ 1,
-        AArch64::getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ true, Size),
+        AArch64::getCopyMapping(AArch64::GPRRegBankID, AArch64::GPRRegBankID,
+                                Size),
         /*NumOperands*/ 2);
     InstructionMapping FPRMapping(
         /*ID*/ 2, /*Cost*/ 1,
-        AArch64::getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ false, Size),
+        AArch64::getCopyMapping(AArch64::FPRRegBankID, AArch64::FPRRegBankID,
+                                Size),
         /*NumOperands*/ 2);
     InstructionMapping GPRToFPRMapping(
         /*ID*/ 3,
         /*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
-        AArch64::getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ true, Size),
+        AArch64::getCopyMapping(AArch64::FPRRegBankID, AArch64::GPRRegBankID,
+                                Size),
         /*NumOperands*/ 2);
     InstructionMapping FPRToGPRMapping(
         /*ID*/ 3,
         /*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
-        AArch64::getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ false, Size),
+        AArch64::getCopyMapping(AArch64::GPRRegBankID, AArch64::FPRRegBankID,
+                                Size),
         /*NumOperands*/ 2);
 
     AltMappings.emplace_back(std::move(GPRMapping));
@@ -422,9 +425,10 @@
         DstIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
     const RegisterBank &SrcRB =
         SrcIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
-    return InstructionMapping{DefaultMappingID, copyCost(DstRB, SrcRB, Size),
-                              AArch64::getCopyMapping(DstIsGPR, SrcIsGPR, Size),
-                              /*NumOperands*/ 2};
+    return InstructionMapping{
+        DefaultMappingID, copyCost(DstRB, SrcRB, Size),
+        AArch64::getCopyMapping(DstRB.getID(), SrcRB.getID(), Size),
+        /*NumOperands*/ 2};
   }
   default:
     break;
Index: lib/Target/AArch64/AArch64GenRegisterBankInfo.def
===================================================================
--- lib/Target/AArch64/AArch64GenRegisterBankInfo.def
+++ lib/Target/AArch64/AArch64GenRegisterBankInfo.def
@@ -121,16 +121,28 @@
   return &ValMappings[ValMappingIdx];
 }
 
+PartialMappingIdx BankIDToCopyMapIdx[] {
+  None, // CCR
+  FirstFPR, // FPR
+  FirstGPR, // GPR
+  None,
+};
+
 /// Get the pointer to the ValueMapping of the operands of a copy
 /// instruction from a GPR or FPR register to a GPR or FPR register
 /// with a size of \p Size.
 ///
 /// If \p DstIsGPR is true, the destination of the copy is on GPR,
 /// otherwise it is on FPR. Same thing for \p SrcIsGPR.
 const RegisterBankInfo::ValueMapping *
-getCopyMapping(bool DstIsGPR, bool SrcIsGPR, unsigned Size) {
-  PartialMappingIdx DstRBIdx = DstIsGPR ? FirstGPR : FirstFPR;
-  PartialMappingIdx SrcRBIdx = SrcIsGPR ? FirstGPR : FirstFPR;
+getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size) {
+  assert(DstBankID < NumRegisterBanks && "Invalid bank ID");
+  assert(SrcBankID < NumRegisterBanks && "Invalid bank ID");
+  PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];
+  PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];
+  assert(DstRBIdx != None && "No such mapping");
+  assert(SrcRBIdx != None && "No such mapping");
+
   if (DstRBIdx == SrcRBIdx)
     return getValueMapping(DstRBIdx, Size);
   assert(Size <= 64 && "GPR cannot handle that size");


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