[PATCH] D27338: [globalisel] Tablegen-erate current Register Bank Information

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
dsanders added reviewers: ab, qcolombet, t.p.northover.
dsanders added a subscriber: llvm-commits.
dsanders added a dependency: D27337: [globalisel][aarch64] Fix unintended assumptions about PartialMappingIdx. NFC..
Herald added subscribers: rovka, dberris, mgorny, vkalintiris.

Adds a RegisterBank tablegen class that can be used to declare the register
banks and an associated tablegen pass to generate the necessary code.

The existing code doesn't have a complete set of PartialMappings so I've
also included a means to exclude certain sizes from the tablegen-erated
assertions.

Depends on https://reviews.llvm.org/D27337


https://reviews.llvm.org/D27338

Files:
  include/llvm/Target/GlobalISel/RegisterBank.td
  include/llvm/Target/Target.td
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64GenRegisterBankInfo.def
  lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  lib/Target/AArch64/AArch64RegisterBankInfo.h
  lib/Target/AArch64/AArch64RegisterBanks.td
  lib/Target/AArch64/CMakeLists.txt
  utils/TableGen/CMakeLists.txt
  utils/TableGen/RegisterBankEmitter.cpp
  utils/TableGen/TableGen.cpp
  utils/TableGen/TableGenBackends.h

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