[PATCH] D27315: [ARM] Fix for 64-bit CAS expansion on ARM32 with -O0

[Tim Northover via Phabricator via llvm-commits]

t.p.northover accepted this revision.
t.p.northover added inline comments.
This revision is now accepted and ready to land.


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Comment at: lib/Target/ARM/ARMExpandPseudoInsts.cpp:938
 
-  unsigned SBCrr = IsThumb ? ARM::t2SBCrr : ARM::SBCrr;
-  MIB = BuildMI(LoadCmpBB, DL, TII->get(SBCrr))
-            .addReg(StatusReg, RegState::Define | RegState::Dead)
+  MIB = BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
             .addReg(DestHi, getKillRegState(Dest.isDead()))
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You can probably drop the "MIB =" here. Otherwise everything looks fine though. Thanks for fixing this!


Repository:
  rL LLVM

https://reviews.llvm.org/D27315