[PATCH] D27308: ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask

[Adhemerval Zanella via Phabricator via llvm-commits]

zatrazz created this revision.
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The relocation R_AARCH64_LDST16_ABS_LO12_NC should set a ld/st
immediate value to bits [11:1] not [11:2].  This patches fixes it
and adds a testcase for regression.

With this fix all the faulty tests on test-suite (clavm, lencod,
and trimaran) pass.


Repository:
  rL LLVM

https://reviews.llvm.org/D27308

Files:
  ELF/Target.cpp
  test/ELF/aarch64-relocs.s


Index: test/ELF/aarch64-relocs.s
===================================================================
--- test/ELF/aarch64-relocs.s
+++ test/ELF/aarch64-relocs.s
@@ -141,16 +141,20 @@
 .section .R_AARCH64_LDST16_ABS_LO12_NC,"ax", at progbits
 ldst16:
   ldr h17, [x19, :lo12:foo16]
+  ldrh w1, [x19, :lo12:foo16]
+  ldrh w2, [x19, :lo12:foo16 + 2]
 foo16:
   .asciz "foo"
-  .size mystr, 3
+  .size mystr, 4
 
 # S = 0x20054, A = 0x4
 # R = ((S + A) & 0x0FFC) << 9 = 0xb000
 # 0xb000 | 0x7d400271 = 0x7d40b271
 # CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
 # CHECK-NEXT: ldst16:
-# CHECK-NEXT:   20054:       71 b2 40 7d     ldr     h17, [x19, #88]
+# CHECK-NEXT:   20054:       71 c2 40 7d     ldr     h17, [x19, #96]
+# CHECK-NEXT:   20058:       61 c2 40 79     ldrh    w1, [x19, #96]
+# CHECK-NEXT:   2005c:       62 c6 40 79     ldrh    w2, [x19, #98]
 
 .section .R_AARCH64_MOVW_UABS,"ax", at progbits
 movz1:
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -1369,7 +1369,7 @@
     or32le(Loc, (Val & 0x0FF8) << 6);
     break;
   case R_AARCH64_LDST16_ABS_LO12_NC:
-    or32le(Loc, (Val & 0x0FFC) << 9);
+    or32le(Loc, (Val & 0x0FFE) << 9);
     break;
   case R_AARCH64_LDST8_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFFF) << 10);


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