[PATCH] D27287: [PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR
Guozhi Wei via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 30 16:11:11 PST 2016
Carrot created this revision.
Carrot added a reviewer: hfinkel.
Carrot added a subscriber: llvm-commits.
Herald added subscribers: amehsan, nemanjai.
This patch fixes pr31144.
Power8 has MTVSRWZ but no LXSIBZX/LXSIHZX, so move 1 or 2 bytes to VSR through MTVSRWZ is much faster than store the extended value into stack and load it with LXSIWZX.
https://reviews.llvm.org/D27287
Files:
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/pr31144.ll
Index: test/CodeGen/PowerPC/pr31144.ll
===================================================================
--- test/CodeGen/PowerPC/pr31144.ll
+++ test/CodeGen/PowerPC/pr31144.ll
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mattr=+vsx < %s | FileCheck %s
+
+declare void @bar(double)
+
+define void @foo1(i8* %p) {
+entry:
+ %0 = load i8, i8* %p, align 1
+ %conv = uitofp i8 %0 to double
+ call void @bar(double %conv)
+ ret void
+
+; CHECK-LABEL: @foo1
+; CHECK: mtvsrwz
+; CHECK-NOT: lxsiwzx
+}
+
+define void @foo2(i16* %p) {
+entry:
+ %0 = load i16, i16* %p, align 2
+ %conv = uitofp i16 %0 to double
+ call void @bar(double %conv)
+ ret void
+
+; CHECK-LABEL: @foo2
+; CHECK: mtvsrwz
+; CHECK-NOT: lxsiwzx
+}
+
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -6609,11 +6609,17 @@
/// \brief Analyze profitability of direct move
/// prefer float load to int load plus direct move
/// when there is no integer use of int load
-static bool directMoveIsProfitable(const SDValue &Op) {
+static bool directMoveIsProfitable(const SDValue &Op, int cpu) {
SDNode *Origin = Op.getOperand(0).getNode();
if (Origin->getOpcode() != ISD::LOAD)
return true;
+ // Power8 has MTVSRWZ but no LXSIBZX/LXSIHZX,
+ // so prefer direct move if the memory size is 1 or 2 bytes.
+ MachineMemOperand *MMO = cast<LoadSDNode>(Origin)->getMemOperand();
+ if (cpu == PPC::DIR_PWR8 && MMO->getSize() <= 2)
+ return true;
+
for (SDNode::use_iterator UI = Origin->use_begin(),
UE = Origin->use_end();
UI != UE; ++UI) {
@@ -6698,7 +6704,8 @@
// If we have direct moves, we can do all the conversion, skip the store/load
// however, without FPCVT we can't do most conversions.
- if (Subtarget.hasDirectMove() && directMoveIsProfitable(Op) &&
+ if (Subtarget.hasDirectMove() &&
+ directMoveIsProfitable(Op, Subtarget.getDarwinDirective()) &&
Subtarget.isPPC64() && Subtarget.hasFPCVT())
return LowerINT_TO_FPDirectMove(Op, DAG, dl);
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