[PATCH] D27173: AMDGPU: Disallow exec as SMEM instruction operand

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
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Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng, kzhuravl, qcolombet.
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This is not in the list of valid inputs for the encoding.
When spilling, copies from exec can be folded directly
into the spill instruction which results in broken
stores.

      

This only fixes the operand constraints, more codegen
work is required to avoid emitting the invalid
spills.

This sort of breaks the dbg.value test. Because the
 register class of the s_load_dwordx2 changes, there
 is a copy to SReg_64, and the copy is the operand
 of dbg_value. The copy is later dead, and removed
 from the dbg_value.


https://reviews.llvm.org/D27173

Files:
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  lib/Target/AMDGPU/SIRegisterInfo.td
  lib/Target/AMDGPU/SMInstructions.td
  test/CodeGen/AMDGPU/llvm.dbg.value.ll
  test/CodeGen/AMDGPU/spill-m0.ll
  test/MC/AMDGPU/smem-err.s

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