[llvm] r288036 - Test commit
Daniel Cederman via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 28 07:33:04 PST 2016
Author: dcederman
Date: Mon Nov 28 09:33:03 2016
New Revision: 288036
URL: http://llvm.org/viewvc/llvm-project?rev=288036&view=rev
Log:
Test commit
Modified:
llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.td
Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.td?rev=288036&r1=288035&r2=288036&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.td Mon Nov 28 09:33:03 2016
@@ -331,7 +331,6 @@ def IntRegs : RegisterClass<"SP", [i32,
(sequence "L%u", 0, 7),
(sequence "O%u", 0, 7))>;
-
// Should be in the same order as IntRegs.
def IntPair : RegisterClass<"SP", [v2i32], 64,
(add I0_I1, I2_I3, I4_I5, I6_I7,
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