[llvm] r288005 - [InstSimplify] allow integer vector types to use computeKnownBits

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 27 13:07:28 PST 2016


Author: spatel
Date: Sun Nov 27 15:07:28 2016
New Revision: 288005

URL: http://llvm.org/viewvc/llvm-project?rev=288005&view=rev
Log:
[InstSimplify] allow integer vector types to use computeKnownBits

Note that the non-splat lshr+lshr test folded, but that does not
work in general. Something is missing or wrong in computeKnownBits
as the non-splat shl+shl test still shows.

Modified:
    llvm/trunk/lib/Analysis/InstructionSimplify.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/test/Analysis/ValueTracking/knownzero-shift.ll

Modified: llvm/trunk/lib/Analysis/InstructionSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstructionSimplify.cpp?rev=288005&r1=288004&r2=288005&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/InstructionSimplify.cpp (original)
+++ llvm/trunk/lib/Analysis/InstructionSimplify.cpp Sun Nov 27 15:07:28 2016
@@ -4380,13 +4380,13 @@ Value *llvm::SimplifyInstruction(Instruc
 
   // In general, it is possible for computeKnownBits to determine all bits in a
   // value even when the operands are not all constants.
-  if (!Result && I->getType()->isIntegerTy()) {
+  if (!Result && I->getType()->isIntOrIntVectorTy()) {
     unsigned BitWidth = I->getType()->getScalarSizeInBits();
     APInt KnownZero(BitWidth, 0);
     APInt KnownOne(BitWidth, 0);
     computeKnownBits(I, KnownZero, KnownOne, DL, /*Depth*/0, AC, I, DT);
     if ((KnownZero | KnownOne).isAllOnesValue())
-      Result = ConstantInt::get(I->getContext(), KnownOne);
+      Result = ConstantInt::get(I->getType(), KnownOne);
   }
 
   /// If called on unreachable code, the above logic may report that the

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=288005&r1=288004&r2=288005&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Sun Nov 27 15:07:28 2016
@@ -580,13 +580,13 @@ Instruction *InstCombiner::FoldShiftByCo
 
     // Check for (X << c1) << c2  and  (X >> c1) >> c2
     if (I.getOpcode() == ShiftOp->getOpcode()) {
-      uint32_t AmtSum = ShiftAmt1+ShiftAmt2;   // Fold into one big shift.
-      // If this is oversized composite shift, then unsigned shifts get 0, ashr
-      // saturates.
+      uint32_t AmtSum = ShiftAmt1 + ShiftAmt2;   // Fold into one big shift.
+      // If this is an oversized composite shift, then unsigned shifts become
+      // zero (handled in InstSimplify) and ashr saturates.
       if (AmtSum >= TypeBits) {
         if (I.getOpcode() != Instruction::AShr)
-          return replaceInstUsesWith(I, Constant::getNullValue(I.getType()));
-        AmtSum = TypeBits-1;  // Saturate to 31 for i32 ashr.
+          return nullptr;
+        AmtSum = TypeBits - 1;  // Saturate to 31 for i32 ashr.
       }
 
       return BinaryOperator::Create(I.getOpcode(), X,

Modified: llvm/trunk/test/Analysis/ValueTracking/knownzero-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ValueTracking/knownzero-shift.ll?rev=288005&r1=288004&r2=288005&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/ValueTracking/knownzero-shift.ll (original)
+++ llvm/trunk/test/Analysis/ValueTracking/knownzero-shift.ll Sun Nov 27 15:07:28 2016
@@ -24,13 +24,9 @@ define i32 @shl_shl(i32 %A) {
   ret i32 %C
 }
 
-; FIXME
-
 define <2 x i33> @shl_shl_splat_vec(<2 x i33> %A) {
 ; CHECK-LABEL: @shl_shl_splat_vec(
-; CHECK-NEXT:    [[B:%.*]] = shl <2 x i33> %A, <i33 5, i33 5>
-; CHECK-NEXT:    [[C:%.*]] = shl <2 x i33> [[B]], <i33 28, i33 28>
-; CHECK-NEXT:    ret <2 x i33> [[C]]
+; CHECK-NEXT:    ret <2 x i33> zeroinitializer
 ;
   %B = shl <2 x i33> %A, <i33 5, i33 5>
   %C = shl <2 x i33> %B, <i33 28, i33 28>
@@ -59,26 +55,18 @@ define i232 @lshr_lshr(i232 %A) {
   ret i232 %C
 }
 
-; FIXME
-
 define <2 x i32> @lshr_lshr_splat_vec(<2 x i32> %A) {
 ; CHECK-LABEL: @lshr_lshr_splat_vec(
-; CHECK-NEXT:    [[B:%.*]] = lshr <2 x i32> %A, <i32 28, i32 28>
-; CHECK-NEXT:    [[C:%.*]] = lshr <2 x i32> [[B]], <i32 4, i32 4>
-; CHECK-NEXT:    ret <2 x i32> [[C]]
+; CHECK-NEXT:    ret <2 x i32> zeroinitializer
 ;
   %B = lshr <2 x i32> %A, <i32 28, i32 28>
   %C = lshr <2 x i32> %B, <i32 4, i32 4>
   ret <2 x i32> %C
 }
 
-; FIXME
-
 define <2 x i32> @lshr_lshr_vec(<2 x i32> %A) {
 ; CHECK-LABEL: @lshr_lshr_vec(
-; CHECK-NEXT:    [[B:%.*]] = lshr <2 x i32> %A, <i32 29, i32 28>
-; CHECK-NEXT:    [[C:%.*]] = lshr <2 x i32> [[B]], <i32 4, i32 5>
-; CHECK-NEXT:    ret <2 x i32> [[C]]
+; CHECK-NEXT:    ret <2 x i32> zeroinitializer
 ;
   %B = lshr <2 x i32> %A, <i32 29, i32 28>
   %C = lshr <2 x i32> %B, <i32 4, i32 5>




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