[llvm] r287856 - TableGen: Allow signed immediates for instruction aliases

[Jacob Baungard Hansen via llvm-commits]

Author: jacob_hansen
Date: Thu Nov 24 02:53:28 2016
New Revision: 287856

URL: http://llvm.org/viewvc/llvm-project?rev=287856&view=rev
Log:
TableGen: Allow signed immediates for instruction aliases

Patch by Daniel Cederman.

Reviewers: stoklund, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D27046

Modified:
    llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp

Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=287856&r1=287855&r2=287856&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Thu Nov 24 02:53:28 2016
@@ -879,7 +879,7 @@ void AsmWriterEmitter::EmitPrintAliasIns
           IAP.addCond(Op + ".isImm()");
 
           Cond = Op + ".getImm() == " +
-                 llvm::utostr(CGA.ResultOperands[i].getImm());
+                 llvm::itostr(CGA.ResultOperands[i].getImm());
           IAP.addCond(Cond);
           break;
         }