[PATCH] D27028: Add intrinsics for constrained floating point operations

[Matt Arsenault via llvm-commits]

arsenm added a comment.

In https://reviews.llvm.org/D27028#604714, @andrew.w.kaylor wrote:

> In https://reviews.llvm.org/D27028#604699, @arsenm wrote:
>
> > It's not handled in general llvm. We currently have a subtarget feature for f32/f64 denormal support in the default rounding mode
>
>
> It looks like several sub-targets have some kind of denormal support, but I didn't look closely enough to see what each of them is doing.  That's kind of why I would prefer to defer the issue...because I haven't thought about it enough to know that I'd be implementing it correctly.
>
> So to get back to Hal's question, is this needed at a per-instruction level?  I understand that you want to select instructions differently based on this setting, but is attaching it to the instruction just a convenient way to get the information to the ISel or can this change across different scopes?


It's the same as the rounding mode and be per-instruction


Repository:
  rL LLVM

https://reviews.llvm.org/D27028