[PATCH] D27008: [LoadStoreVectorizer] Enable vectorization of stores in the presence of an aliasing load

Justin Lebar via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 22 15:58:21 PST 2016


jlebar added inline comments.


================
Comment at: lib/Transforms/Vectorize/LoadStoreVectorizer.cpp:486
+    // If a barrier memory instruction was found, chain instructions that follow
+    // will not be added to the valid prefix
+    if (BarrierMemoryInstr && OBB.dominates(BarrierMemoryInstr, ChainInstr))
----------------
Nit, pls end sentences with periods.


================
Comment at: lib/Transforms/Vectorize/LoadStoreVectorizer.cpp:490
+
     for (Instruction *MemInstr : MemoryInstrs) {
+      // If a barrier memory instruction was found, do not check past it
----------------
Can we add a comment on this loop to the effect of:

> Find the first instruction (in BB order) which "conflicts with" any of ChainInstrs[0..ChainInstrIdx].


================
Comment at: lib/Transforms/Vectorize/LoadStoreVectorizer.cpp:529
+    // Continue the search only for store chains
+    if (IsLoadChain && BarrierMemoryInstr)
       break;
----------------
As discussed IRL, not sure why we need this early-break at all.


https://reviews.llvm.org/D27008





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