[llvm] r287575 - [MemorySSA] Fix unit tests broken by D26704

[Mandeep Singh Grang via llvm-commits]

Author: mgrang
Date: Mon Nov 21 14:39:08 2016
New Revision: 287575

URL: http://llvm.org/viewvc/llvm-project?rev=287575&view=rev
Log:
[MemorySSA] Fix unit tests broken by D26704

Summary:
D26704 fixed the non-determinism in codegen by sorting basic blocks before
iteration so as to have a defined iteration order. As a result we need to fix
the names (numbers) of the temporaries in the following unit tests:
  test/Transforms/Util/MemorySSA/multi-edges.ll
  test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll

Reviewers: dberlin, david2050, mgrang

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26926

Modified:
    llvm/trunk/test/Transforms/Util/MemorySSA/multi-edges.ll
    llvm/trunk/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll

Modified: llvm/trunk/test/Transforms/Util/MemorySSA/multi-edges.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Util/MemorySSA/multi-edges.ll?rev=287575&r1=287574&r2=287575&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Util/MemorySSA/multi-edges.ll (original)
+++ llvm/trunk/test/Transforms/Util/MemorySSA/multi-edges.ll Mon Nov 21 14:39:08 2016
@@ -13,15 +13,15 @@ entry:
   br i1 %a, label %Loop.Body, label %Loop.End
 
 Loop.Body:
-; CHECK: 4 = MemoryPhi({entry,1},{Loop.End,3})
-; CHECK-NEXT: 2 = MemoryDef(4)
+; CHECK: 3 = MemoryPhi({entry,1},{Loop.End,4})
+; CHECK-NEXT: 2 = MemoryDef(3)
 ; CHECK-NEXT: store i32 5
   store i32 5, i32* %0, align 4
   br i1 %a, label %Loop.End, label %Loop.End ; WhyDoWeEvenHaveThatLever.gif
 
 Loop.End:
-; CHECK: 3 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2})
-; CHECK-NEXT: MemoryUse(3)
+; CHECK: 4 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2})
+; CHECK-NEXT: MemoryUse(4)
 ; CHECK-NEXT: %1 = load
   %1 = load i32, i32* %0, align 4
   %2 = icmp eq i32 5, %1

Modified: llvm/trunk/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll?rev=287575&r1=287574&r2=287575&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll (original)
+++ llvm/trunk/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll Mon Nov 21 14:39:08 2016
@@ -42,22 +42,22 @@ Entry:
   br label %OuterLoop
 
 OuterLoop:
-; CHECK: 5 = MemoryPhi({Entry,1},{InnerLoop.Tail,3})
+; CHECK: 4 = MemoryPhi({Entry,1},{InnerLoop.Tail,3})
 ; CHECK-NEXT: %Val.Outer =
   %Val.Outer = call i8 @getValue()
-; CHECK: 2 = MemoryDef(5)
+; CHECK: 2 = MemoryDef(4)
 ; CHECK-NEXT: store i8 %Val.Outer
   store i8 %Val.Outer, i8* %Arg
   call void @doThingWithoutReading()
   br label %InnerLoop
 
 InnerLoop:
-; CHECK: 4 = MemoryPhi({OuterLoop,2},{InnerLoop,3})
-; CHECK-NEXT: ; MemoryUse(4)
+; CHECK: 5 = MemoryPhi({OuterLoop,2},{InnerLoop,3})
+; CHECK-NEXT: ; MemoryUse(5)
 ; CHECK-NEXT: %StartingAccess = load
   %StartingAccess = load i8, i8* %Arg, align 4
   %Val.Inner = call i8 @getValue()
-; CHECK: 3 = MemoryDef(4)
+; CHECK: 3 = MemoryDef(5)
 ; CHECK-NEXT: store i8 %Val.Inner
   store i8 %Val.Inner, i8* %Arg
   call void @doThingWithoutReading()