[PATCH] D26926: [MemorySSA] Fix unit tests broken by D26704
Mandeep Singh Grang via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 21 12:17:17 PST 2016
mgrang created this revision.
mgrang added reviewers: dberlin, david2050.
mgrang added a subscriber: llvm-commits.
mgrang set the repository for this revision to rL LLVM.
https://reviews.llvm.org/D26704 fixed the non-determinism in codegen by sorting basic blocks before
iteration so as to have a defined iteration order. As a result we need to fix
the names (numbers) of the temporaries in the following unit tests:
test/Transforms/Util/MemorySSA/multi-edges.ll
test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
Repository:
rL LLVM
https://reviews.llvm.org/D26926
Files:
test/Transforms/Util/MemorySSA/multi-edges.ll
test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
Index: test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
===================================================================
--- test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
+++ test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
@@ -42,22 +42,22 @@
br label %OuterLoop
OuterLoop:
-; CHECK: 5 = MemoryPhi({Entry,1},{InnerLoop.Tail,3})
+; CHECK: 4 = MemoryPhi({Entry,1},{InnerLoop.Tail,3})
; CHECK-NEXT: %Val.Outer =
%Val.Outer = call i8 @getValue()
-; CHECK: 2 = MemoryDef(5)
+; CHECK: 2 = MemoryDef(4)
; CHECK-NEXT: store i8 %Val.Outer
store i8 %Val.Outer, i8* %Arg
call void @doThingWithoutReading()
br label %InnerLoop
InnerLoop:
-; CHECK: 4 = MemoryPhi({OuterLoop,2},{InnerLoop,3})
-; CHECK-NEXT: ; MemoryUse(4)
+; CHECK: 5 = MemoryPhi({OuterLoop,2},{InnerLoop,3})
+; CHECK-NEXT: ; MemoryUse(5)
; CHECK-NEXT: %StartingAccess = load
%StartingAccess = load i8, i8* %Arg, align 4
%Val.Inner = call i8 @getValue()
-; CHECK: 3 = MemoryDef(4)
+; CHECK: 3 = MemoryDef(5)
; CHECK-NEXT: store i8 %Val.Inner
store i8 %Val.Inner, i8* %Arg
call void @doThingWithoutReading()
Index: test/Transforms/Util/MemorySSA/multi-edges.ll
===================================================================
--- test/Transforms/Util/MemorySSA/multi-edges.ll
+++ test/Transforms/Util/MemorySSA/multi-edges.ll
@@ -13,15 +13,15 @@
br i1 %a, label %Loop.Body, label %Loop.End
Loop.Body:
-; CHECK: 4 = MemoryPhi({entry,1},{Loop.End,3})
-; CHECK-NEXT: 2 = MemoryDef(4)
+; CHECK: 3 = MemoryPhi({entry,1},{Loop.End,4})
+; CHECK-NEXT: 2 = MemoryDef(3)
; CHECK-NEXT: store i32 5
store i32 5, i32* %0, align 4
br i1 %a, label %Loop.End, label %Loop.End ; WhyDoWeEvenHaveThatLever.gif
Loop.End:
-; CHECK: 3 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2})
-; CHECK-NEXT: MemoryUse(3)
+; CHECK: 4 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2})
+; CHECK-NEXT: MemoryUse(4)
; CHECK-NEXT: %1 = load
%1 = load i32, i32* %0, align 4
%2 = icmp eq i32 5, %1
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