[PATCH] D26590: [X86][SSE] Improve lowering of vXi64 multiply with known zero 32-bit halves

[Craig Topper via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:19952
 
   SDValue Ahi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, A, 32, DAG);
   SDValue Bhi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, B, 32, DAG);
----------------
Should we pull these and the bit casts below into the blocks that use them?


Repository:
  rL LLVM

https://reviews.llvm.org/D26590