[PATCH] D26712: [x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 15 15:48:07 PST 2016


spatel created this revision.
spatel added reviewers: craig.topper, zvi, RKSimon.
spatel added a subscriber: llvm-commits.
Herald added a subscriber: mcrosier.

Paraphrasing/plagiarizing the comment in fp-logic-replace.ll:
We can replace "scalar" FP-bitwise-logic with the optimal type instruction. Scalar SSE/AVX FP-logic instructions only exist in your imagination and/or the bowels of compilers, but float and double variants of FP-logic instructions are reality, and the float variant may be a shorter instruction depending on which flavor of vector ISA you have...so just prefer float all the time. Yay, x86!


https://reviews.llvm.org/D26712

Files:
  lib/Target/X86/X86InstrInfo.cpp
  test/CodeGen/X86/fast-isel-select-sse.ll
  test/CodeGen/X86/fp-logic-replace.ll
  test/CodeGen/X86/fp-logic.ll
  test/CodeGen/X86/fp-select-cmp-and.ll
  test/CodeGen/X86/sse-minmax.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D26712.78089.patch
Type: text/x-patch
Size: 20290 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161115/62c6ad31/attachment.bin>


More information about the llvm-commits mailing list