[llvm] r287051 - [x86] regenerate checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 15 15:09:53 PST 2016
Author: spatel
Date: Tue Nov 15 17:09:53 2016
New Revision: 287051
URL: http://llvm.org/viewvc/llvm-project?rev=287051&view=rev
Log:
[x86] regenerate checks; NFC
Modified:
llvm/trunk/test/CodeGen/X86/fp-logic.ll
Modified: llvm/trunk/test/CodeGen/X86/fp-logic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-logic.ll?rev=287051&r1=287050&r2=287051&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-logic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-logic.ll Tue Nov 15 17:09:53 2016
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=sse2 < %s | FileCheck %s
; PR22428: https://llvm.org/bugs/show_bug.cgi?id=22428
@@ -7,7 +8,7 @@
; f5, f6, f7, and f8 are less clear.
;
; For f5 and f6, we can save a register move by using an FP logic instruction,
-; but we may need to calculate the relative costs of an SSE op vs. int op vs.
+; but we may need to calculate the relative costs of an SSE op vs. int op vs.
; scalar <-> SSE register moves.
;
; For f7 and f8, the SSE instructions don't take immediate operands, so if we
@@ -25,7 +26,7 @@ define i32 @f1(float %x, i32 %y) {
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: andl %edi, %eax
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %bc1, %y
ret i32 %and
@@ -39,7 +40,7 @@ define i32 @f2(float %x, i32 %y) {
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: andl %edi, %eax
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %y, %bc1
ret i32 %and
@@ -53,7 +54,7 @@ define i32 @f3(float %x) {
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %bc1, 1
ret i32 %and
@@ -67,7 +68,7 @@ define i32 @f4(float %x) {
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: andl $2, %eax
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 2, %bc1
ret i32 %and
@@ -82,7 +83,7 @@ define float @f5(float %x, i32 %y) {
; CHECK-NEXT: andl %edi, %eax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %bc1, %y
%bc2 = bitcast i32 %and to float
@@ -98,7 +99,7 @@ define float @f6(float %x, i32 %y) {
; CHECK-NEXT: andl %edi, %eax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %y, %bc1
%bc2 = bitcast i32 %and to float
@@ -113,7 +114,7 @@ define float @f7(float %x) {
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: andps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %bc1, 3
%bc2 = bitcast i32 %and to float
@@ -128,7 +129,7 @@ define float @f8(float %x) {
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: andps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 4, %bc1
%bc2 = bitcast i32 %and to float
@@ -143,7 +144,7 @@ define i32 @f9(float %x, float %y) {
; CHECK-NEXT: andps %xmm1, %xmm0
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%bc2 = bitcast float %y to i32
%and = and i32 %bc1, %bc2
@@ -157,7 +158,7 @@ define float @f10(float %x, float %y) {
; CHECK: # BB#0:
; CHECK-NEXT: andps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%bc2 = bitcast float %y to i32
%and = and i32 %bc1, %bc2
@@ -170,7 +171,7 @@ define float @or(float %x, float %y) {
; CHECK: # BB#0:
; CHECK-NEXT: orps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%bc2 = bitcast float %y to i32
%and = or i32 %bc1, %bc2
@@ -183,7 +184,7 @@ define float @xor(float %x, float %y) {
; CHECK: # BB#0:
; CHECK-NEXT: xorps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%bc2 = bitcast float %y to i32
%and = xor i32 %bc1, %bc2
@@ -197,7 +198,7 @@ define float @f7_or(float %x) {
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: orps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = or i32 %bc1, 3
%bc2 = bitcast i32 %and to float
@@ -210,7 +211,7 @@ define float @f7_xor(float %x) {
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: xorps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = xor i32 %bc1, 3
%bc2 = bitcast i32 %and to float
@@ -224,7 +225,7 @@ define double @doubles(double %x, double
; CHECK: # BB#0:
; CHECK-NEXT: andpd %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast double %x to i64
%bc2 = bitcast double %y to i64
%and = and i64 %bc1, %bc2
@@ -238,7 +239,7 @@ define double @f7_double(double %x) {
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: andpd %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast double %x to i64
%and = and i64 %bc1, 3
%bc2 = bitcast i64 %and to double
@@ -255,7 +256,7 @@ define float @movmsk(float %x) {
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: andps %xmm1, %xmm0
; CHECK-NEXT: retq
-
+;
%bc1 = bitcast float %x to i32
%and = and i32 %bc1, 2147483648
%bc2 = bitcast i32 %and to float
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