[PATCH] D26429: [LSR] Allow formula containing Reg for SCEVAddRecExpr with loop other than current loop
Wei Mi via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 15 10:45:44 PST 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL286999: [LSR] Allow formula containing Reg for SCEVAddRecExpr related with outerloop. (authored by wmi).
Changed prior to commit:
https://reviews.llvm.org/D26429?vs=77580&id=78030#toc
Repository:
rL LLVM
https://reviews.llvm.org/D26429
Files:
llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/trunk/test/CodeGen/X86/licm-nested.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/nested-loop.ll
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