[llvm] r286981 - [ARM] GlobalISel: Remove unused members. NFCI

Diana Picus via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 15 08:42:10 PST 2016


Author: rovka
Date: Tue Nov 15 10:42:10 2016
New Revision: 286981

URL: http://llvm.org/viewvc/llvm-project?rev=286981&view=rev
Log:
[ARM] GlobalISel: Remove unused members. NFCI

This silences some warnings that I didn't see with my host compiler.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
    llvm/trunk/lib/Target/ARM/ARMInstructionSelector.h
    llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp?rev=286981&r1=286980&r2=286981&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp Tue Nov 15 10:42:10 2016
@@ -25,10 +25,9 @@ using namespace llvm;
 #error "You shouldn't build this"
 #endif
 
-ARMInstructionSelector::ARMInstructionSelector(const ARMBaseTargetMachine &TM,
-                                               const ARMSubtarget &STI,
+ARMInstructionSelector::ARMInstructionSelector(const ARMSubtarget &STI,
                                                const ARMRegisterBankInfo &RBI)
-    : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
+    : InstructionSelector(), TII(*STI.getInstrInfo()),
       TRI(*STI.getRegisterInfo()), RBI(RBI) {}
 
 bool ARMInstructionSelector::select(llvm::MachineInstr &I) const {

Modified: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstructionSelector.h?rev=286981&r1=286980&r2=286981&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.h Tue Nov 15 10:42:10 2016
@@ -24,15 +24,12 @@ class ARMSubtarget;
 
 class ARMInstructionSelector : public InstructionSelector {
 public:
-  ARMInstructionSelector(const ARMBaseTargetMachine &TM,
-                         const ARMSubtarget &STI,
+  ARMInstructionSelector(const ARMSubtarget &STI,
                          const ARMRegisterBankInfo &RBI);
 
   virtual bool select(MachineInstr &I) const override;
 
 private:
-  const ARMBaseTargetMachine &TM;
-  const ARMSubtarget &STI;
   const ARMBaseInstrInfo &TII;
   const ARMBaseRegisterInfo &TRI;
   const ARMRegisterBankInfo &RBI;

Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=286981&r1=286980&r2=286981&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Nov 15 10:42:10 2016
@@ -307,7 +307,7 @@ ARMBaseTargetMachine::getSubtargetImpl(c
     // FIXME: At this point, we can't rely on Subtarget having RBI.
     // It's awkward to mix passing RBI and the Subtarget; should we pass
     // TII/TRI as well?
-    GISel->InstSelector.reset(new ARMInstructionSelector(*this, *I, *RBI));
+    GISel->InstSelector.reset(new ARMInstructionSelector(*I, *RBI));
 
     GISel->RegBankInfo.reset(RBI);
 #endif




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