[PATCH] D26605: [DAGCombiner] Fix infinite loop in vector mul/shl combining

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:2163
     SDValue C3 = DAG.getNode(ISD::SHL, SDLoc(N), VT, N1, N0.getOperand(1));
-    AddToWorklist(C3.getNode());
+    assert(isConstantOrConstantVector(C3));
     return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), C3);
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asserts need a message : assert(isConstantOrConstantVector(C3) && "Failed to constant fold");


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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4717
     SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1);
-    AddToWorklist(Shl.getNode());
+    assert(isConstantOrConstantVector(Shl));
     return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), Shl);
----------------
asserts need a message : assert(isConstantOrConstantVector(Shl) && "Failed to constant fold");


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Comment at: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3476
+      continue;
+    }
     ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
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I don't think this is safe (e.g. OR(C1, UNDEF) --> at least C1).


Repository:
  rL LLVM

https://reviews.llvm.org/D26605