[PATCH] D26181: RegCall - Handling v64i1 in 32/64 bit target

[Oren Ben Simhon via llvm-commits]

oren_ben_simhon marked 5 inline comments as done.
oren_ben_simhon added inline comments.


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Comment at: lib/Target/X86/X86CallingConv.h:35
+  // registers for mask types
+  static const std::vector<MCPhysReg> RegList{X86::EAX, X86::ECX, X86::EDX,
+                                              X86::EDI, X86::ESI};
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delena wrote:
> What is this list for?
This is the list of registers that can be used to pass the value, according to regcall calling convention.
Only if two registers will be available the value will be passed.


Repository:
  rL LLVM

https://reviews.llvm.org/D26181