[PATCH] D25966: [AArch64] Lower multiplication by a constant int to shl+add+shl

[Haicheng Wu via llvm-commits]

haicheng updated this revision to Diff 77712.
haicheng added a comment.

Rebase the code.


Repository:
  rL LLVM

https://reviews.llvm.org/D25966

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/mul_pow2.ll

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