D26472: AMDGPU/SI: Support data types other than V4f32 in image intrinsics
Fang, Changpeng via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 11 10:00:49 PST 2016
Ping.
This work is for the following ticket!
Software Development
SWDEV-104469
[ROCm CQE][OCLonLC][Fiji] WF conformance test Images - 3 Kernel and 3 samplerless (*, pitch and maxsize) tests failed
Thanks;
Changpeng
-----Original Message-----
From: Changpeng Fang [mailto:changpeng.fang at amd.com]
Sent: Wednesday, November 09, 2016 2:03 PM
To: Fang, Changpeng; Arsenault, Matthew; Zhuravlyov, Konstantin; Stellard, Thomas
Cc: Ding, Wei; nhaehnle at gmail.com; llvm-commits at lists.llvm.org; Liu, Yaxun (Sam); Tye, Tony
Subject: [PATCH] D26472: AMDGPU/SI: Support data types other than V4f32 in image intrinsics
cfang created this revision.
cfang added reviewers: tstellarAMD, arsenm, kzhuravl.
cfang added subscribers: arsenm, llvm-commits.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng.
Extend image intrinsics to support data types of V1F32 and V2F32.
TODO: we should define a mapping table to change the opcode for data type of V2F32 but just one channel is active, even though such case should be very rare.
https://reviews.llvm.org/D26472
Files:
lib/Target/AMDGPU/MIMGInstructions.td
lib/Target/AMDGPU/SIISelLowering.cpp
test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll
test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll
More information about the llvm-commits
mailing list