[PATCH] D26551: [Power9] Add patterns for vnegd, vnegw

[Ehsan Amiri via llvm-commits]

amehsan created this revision.
amehsan added reviewers: kbarton, hfinkel, sfertile, syzaara, jtony, nemanjai, lei.
amehsan added subscribers: llvm-commits, echristo.

Added patterns for the new instructions


https://reviews.llvm.org/D26551

Files:
  lib/Target/PowerPC/PPCInstrAltivec.td
  test/CodeGen/PowerPC/vsx-p9.ll


Index: test/CodeGen/PowerPC/vsx-p9.ll
===================================================================
--- test/CodeGen/PowerPC/vsx-p9.ll
+++ test/CodeGen/PowerPC/vsx-p9.ll
@@ -1,9 +1,6 @@
 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
 ; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
-; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s
-
 @uca = global <16 x i8> zeroinitializer, align 16
 @ucb = global <16 x i8> zeroinitializer, align 16
 @sca = global <16 x i8> zeroinitializer, align 16
@@ -143,4 +140,26 @@
   ret void
 }
 
+define <4 x i32> @test0(<4 x i32> %a) local_unnamed_addr #0 {
+entry:
+  %sub.i = sub <4 x i32> zeroinitializer, %a
+  ret <4 x i32> %sub.i
+
+; CHECK-LABEL: @test0
+; CHECK: vnegw 2, 2
+; CHECK: blr
+
+}
+
+define <2 x i64> @test1(<2 x i64> %a) local_unnamed_addr #0 {
+entry:
+  %sub.i = sub <2 x i64> zeroinitializer, %a
+  ret <2 x i64> %sub.i
+
+; CHECK-LABEL: @test1
+; CHECK: vnegd 2, 2
+; CHECK: blr
+
+}
+
 declare void @sink(...)
Index: lib/Target/PowerPC/PPCInstrAltivec.td
===================================================================
--- lib/Target/PowerPC/PPCInstrAltivec.td
+++ lib/Target/PowerPC/PPCInstrAltivec.td
@@ -1310,8 +1310,13 @@
 }
 
 // Vector Integer Negate
-def VNEGW : VX_VT5_EO5_VB5<1538, 6, "vnegw", []>;
-def VNEGD : VX_VT5_EO5_VB5<1538, 7, "vnegd", []>;
+def VNEGW : VX_VT5_EO5_VB5<1538, 6, "vnegw",
+                           [(set v4i32:$vD,
+                            (sub (v4i32 immAllZerosV), v4i32:$vB))]>;
+
+def VNEGD : VX_VT5_EO5_VB5<1538, 7, "vnegd",
+                           [(set v2i64:$vD,
+                            (sub (v2i64 (bitconvert (v4i32 immAllZerosV))), v2i64:$vB))]>;
 
 // Vector Parity Byte
 def VPRTYBW : VX_VT5_EO5_VB5<1538,  8, "vprtybw", []>;


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