[PATCH] D18738: Add new !unconditionally_dereferenceable load instruction metadata

[whitequark via llvm-commits]

whitequark added a comment.

@sanjoy OK, I understand now. In a nutshell, our disagreement was in whether dead code in IR can affect semantics of live code. This doesn't strike me as particularly bad (even after looking at your examples--clearly they shouldn't use !unconditionally_dereferenceable, but that doesn't mean it's not useful elsewhere), but you clearly have more experience here, so I won't argue that my approach is viable for upstream.

Do you have any suggestions for implementing this functionality in a cleaner way?


Repository:
  rL LLVM

https://reviews.llvm.org/D18738