[llvm] r286592 - [AArch64] Enable merging of adjacent zero stores for all subtargets.
Chad Rosier via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 11 06:10:12 PST 2016
Author: mcrosier
Date: Fri Nov 11 08:10:12 2016
New Revision: 286592
URL: http://llvm.org/viewvc/llvm-project?rev=286592&view=rev
Log:
[AArch64] Enable merging of adjacent zero stores for all subtargets.
This optimization merges adjacent zero stores into a wider store.
e.g.,
strh wzr, [x0]
strh wzr, [x0, #2]
; becomes
str wzr, [x0]
e.g.,
str wzr, [x0]
str wzr, [x0, #4]
; becomes
str xzr, [x0]
Previously, this was only enabled for Kryo and Cortex-A57.
Differential Revision: https://reviews.llvm.org/D26396
Modified:
llvm/trunk/lib/Target/AArch64/AArch64.td
llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
llvm/trunk/test/CodeGen/AArch64/arm64-narrow-st-merge.ll
Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=286592&r1=286591&r2=286592&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Fri Nov 11 08:10:12 2016
@@ -61,11 +61,6 @@ def FeatureReserveX18 : SubtargetFeature
"Reserve X18, making it unavailable "
"as a GPR">;
-def FeatureMergeNarrowZeroSt : SubtargetFeature<"merge-narrow-zero-st",
- "MergeNarrowZeroStores", "true",
- "Merge narrow zero store "
- "instructions">;
-
def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
"Use alias analysis during codegen">;
@@ -182,7 +177,6 @@ def ProcA57 : SubtargetFeature<"a57"
FeatureCrypto,
FeatureCustomCheapAsMoveHandling,
FeatureFPARMv8,
- FeatureMergeNarrowZeroSt,
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
@@ -253,7 +247,6 @@ def ProcKryo : SubtargetFeature<"kryo
FeatureCrypto,
FeatureCustomCheapAsMoveHandling,
FeatureFPARMv8,
- FeatureMergeNarrowZeroSt,
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
Modified: llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp?rev=286592&r1=286591&r2=286592&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp Fri Nov 11 08:10:12 2016
@@ -1699,8 +1699,7 @@ bool AArch64LoadStoreOpt::runOnMachineFu
UsedRegs.resize(TRI->getNumRegs());
bool Modified = false;
- bool enableNarrowZeroStOpt =
- Subtarget->mergeNarrowStores() && !Subtarget->requiresStrictAlign();
+ bool enableNarrowZeroStOpt = !Subtarget->requiresStrictAlign();
for (auto &MBB : Fn)
Modified |= optimizeBlock(MBB, enableNarrowZeroStOpt);
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=286592&r1=286591&r2=286592&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Fri Nov 11 08:10:12 2016
@@ -71,7 +71,6 @@ protected:
// StrictAlign - Disallow unaligned memory accesses.
bool StrictAlign = false;
- bool MergeNarrowZeroStores = false;
bool UseAA = false;
bool PredictableSelectIsExpensive = false;
bool BalanceFPOps = false;
@@ -179,7 +178,6 @@ public:
bool hasCrypto() const { return HasCrypto; }
bool hasCRC() const { return HasCRC; }
bool hasRAS() const { return HasRAS; }
- bool mergeNarrowStores() const { return MergeNarrowZeroStores; }
bool balanceFPOps() const { return BalanceFPOps; }
bool predictableSelectIsExpensive() const {
return PredictableSelectIsExpensive;
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-narrow-st-merge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-narrow-st-merge.ll?rev=286592&r1=286591&r2=286592&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-narrow-st-merge.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-narrow-st-merge.ll Fri Nov 11 08:10:12 2016
@@ -1,6 +1,4 @@
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple aarch64_be--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=kryo -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
; CHECK-LABEL: Strh_zero
; CHECK: str wzr
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