[PATCH] D26429: [LSR] Allow formula containing Reg for SCEVAddRecExpr with loop other than current loop

[Quentin Colombet via llvm-commits]

qcolombet added a comment.

Hi Wei,

Looks mostly good to me.
Couple of comments regarding the test case.

Cheers,
-Quentin



================
Comment at: test/Transforms/LoopStrengthReduce/nested-loop.ll:2
+; RUN: opt -loop-reduce -disable-output -debug-only=loop-reduce < %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+
----------------
Could you add a comment on what this loop is supposed to check?
I believe we want to stress that the relevant bit is the use of outer loop IV in inner loop. 


================
Comment at: test/Transforms/LoopStrengthReduce/nested-loop.ll:2
+; RUN: opt -loop-reduce -disable-output -debug-only=loop-reduce < %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+
----------------
qcolombet wrote:
> Could you add a comment on what this loop is supposed to check?
> I believe we want to stress that the relevant bit is the use of outer loop IV in inner loop. 
Instead of parsing the debug output, could you expose a test case that takes advantage of the newly kept formulae?
Basically, I am asking for check lines over the IR, not the debug output.


Repository:
  rL LLVM

https://reviews.llvm.org/D26429