[PATCH] D26396: [AArch64] Enable merging of adjacent zero stores for all subtargets.

[Chad Rosier via llvm-commits]

mcrosier created this revision.
mcrosier added reviewers: jmolloy, t.p.northover, rengolin, pgode, MatzeB, evandro.
mcrosier added subscribers: llvm-commits, gberry.
Herald added a subscriber: aemerson.

This optimization merges adjacent zero stores into a wider store.

e.g.,

  strh wzr, [x0]
  strh wzr, [x0, #2]
  ; becomes
  str wzr, [x0]

e.g.,

  str wzr, [x0]
  str wzr, [x0, #4]
  ; becomes
  str xzr, [x0]

Previously, this was only enabled for Kryo and Cortex-A57.  I'd like to enable it for all subtargets.

Chad


https://reviews.llvm.org/D26396

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/arm64-narrow-st-merge.ll


Index: test/CodeGen/AArch64/arm64-narrow-st-merge.ll
===================================================================
--- test/CodeGen/AArch64/arm64-narrow-st-merge.ll
+++ test/CodeGen/AArch64/arm64-narrow-st-merge.ll
@@ -1,6 +1,11 @@
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple aarch64_be--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=kryo -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
+; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64_be--none-eabi -mcpu=cortex-a57 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=kryo -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=cyclone -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=exynos-m1 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=exynos-m2 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64--none-eabi -mcpu=vulcan -verify-machineinstrs | FileCheck %s
 
 ; CHECK-LABEL: Strh_zero
 ; CHECK: str wzr
Index: lib/Target/AArch64/AArch64Subtarget.h
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.h
+++ lib/Target/AArch64/AArch64Subtarget.h
@@ -71,7 +71,6 @@
 
   // StrictAlign - Disallow unaligned memory accesses.
   bool StrictAlign = false;
-  bool MergeNarrowZeroStores = false;
   bool UseAA = false;
   bool PredictableSelectIsExpensive = false;
   bool BalanceFPOps = false;
@@ -179,7 +178,6 @@
   bool hasCrypto() const { return HasCrypto; }
   bool hasCRC() const { return HasCRC; }
   bool hasRAS() const { return HasRAS; }
-  bool mergeNarrowStores() const { return MergeNarrowZeroStores; }
   bool balanceFPOps() const { return BalanceFPOps; }
   bool predictableSelectIsExpensive() const {
     return PredictableSelectIsExpensive;
Index: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
===================================================================
--- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1699,8 +1699,7 @@
   UsedRegs.resize(TRI->getNumRegs());
 
   bool Modified = false;
-  bool enableNarrowZeroStOpt =
-      Subtarget->mergeNarrowStores() && !Subtarget->requiresStrictAlign();
+  bool enableNarrowZeroStOpt = !Subtarget->requiresStrictAlign();
   for (auto &MBB : Fn)
     Modified |= optimizeBlock(MBB, enableNarrowZeroStOpt);
 
Index: lib/Target/AArch64/AArch64.td
===================================================================
--- lib/Target/AArch64/AArch64.td
+++ lib/Target/AArch64/AArch64.td
@@ -61,11 +61,6 @@
                                          "Reserve X18, making it unavailable "
                                          "as a GPR">;
 
-def FeatureMergeNarrowZeroSt : SubtargetFeature<"merge-narrow-zero-st",
-                                                "MergeNarrowZeroStores", "true",
-                                                "Merge narrow zero store "
-                                                "instructions">;
-
 def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
                                     "Use alias analysis during codegen">;
 
@@ -182,7 +177,6 @@
                                    FeatureCrypto,
                                    FeatureCustomCheapAsMoveHandling,
                                    FeatureFPARMv8,
-                                   FeatureMergeNarrowZeroSt,
                                    FeatureNEON,
                                    FeaturePerfMon,
                                    FeaturePostRAScheduler,
@@ -253,7 +247,6 @@
                                    FeatureCrypto,
                                    FeatureCustomCheapAsMoveHandling,
                                    FeatureFPARMv8,
-                                   FeatureMergeNarrowZeroSt,
                                    FeatureNEON,
                                    FeaturePerfMon,
                                    FeaturePostRAScheduler,


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