[llvm] r286109 - [SystemZ] Fixes in SchedModels for older subtargets.

[Jonas Paulsson via llvm-commits]

Author: jonpa
Date: Mon Nov  7 08:47:25 2016
New Revision: 286109

URL: http://llvm.org/viewvc/llvm-project?rev=286109&view=rev
Log:
[SystemZ] Fixes in SchedModels for older subtargets.

IssueWidth updated to reflect the capacity of the issue unit correctly.
Correct number of FX and LS units modelled (2, was 1).

Review: Ulrich Weigand

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
    llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td?rev=286109&r1=286108&r2=286109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ13.td Mon Nov  7 08:47:25 2016
@@ -16,7 +16,7 @@ def Z13Model : SchedMachineModel {
 
     let UnsupportedFeatures = Arch11UnsupportedFeatures.List;
     
-    let IssueWidth = 6;             // 2 * 3 instructions decoded per cycle.
+    let IssueWidth = 8;
     let MicroOpBufferSize = 60;     // Issue queues
     let LoadLatency = 1;            // Optimistic load latency.
 

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td?rev=286109&r1=286108&r2=286109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZ196.td Mon Nov  7 08:47:25 2016
@@ -16,7 +16,7 @@ def Z196Model : SchedMachineModel {
 
     let UnsupportedFeatures = Arch9UnsupportedFeatures.List;
     
-    let IssueWidth = 3;             // 3 instructions decoded per cycle.
+    let IssueWidth = 5;
     let MicroOpBufferSize = 40;     // Issue queues
     let LoadLatency = 1;            // Optimistic load latency.
 
@@ -56,8 +56,8 @@ def : WriteRes<Lat20, []> { let Latency
 def : WriteRes<Lat30, []> { let Latency = 30; let NumMicroOps = 0;}
 
 // Execution units.
-def Z196_FXUnit : ProcResource<1>;
-def Z196_LSUnit : ProcResource<1>;
+def Z196_FXUnit : ProcResource<2>;
+def Z196_LSUnit : ProcResource<2>;
 def Z196_FPUnit : ProcResource<1>;
 
 // Subtarget specific definitions of scheduling resources.

Modified: llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td?rev=286109&r1=286108&r2=286109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZScheduleZEC12.td Mon Nov  7 08:47:25 2016
@@ -16,7 +16,7 @@ def ZEC12Model : SchedMachineModel {
 
     let UnsupportedFeatures = Arch10UnsupportedFeatures.List;
     
-    let IssueWidth = 3;             // 3 instructions decoded per cycle.
+    let IssueWidth = 5;
     let MicroOpBufferSize = 40;     // Issue queues
     let LoadLatency = 1;            // Optimistic load latency.
 
@@ -56,10 +56,10 @@ def : WriteRes<Lat20, []> { let Latency
 def : WriteRes<Lat30, []> { let Latency = 30; let NumMicroOps = 0;}
 
 // Execution units.
-def ZEC12_VBUnit : ProcResource<1>;
-def ZEC12_FXUnit : ProcResource<1>;
-def ZEC12_LSUnit : ProcResource<1>;
+def ZEC12_FXUnit : ProcResource<2>;
+def ZEC12_LSUnit : ProcResource<2>;
 def ZEC12_FPUnit : ProcResource<1>;
+def ZEC12_VBUnit : ProcResource<1>;
 
 // Subtarget specific definitions of scheduling resources.
 def : WriteRes<FXU,      [ZEC12_FXUnit]> { let Latency = 1; }