[llvm] r286034 - Strip trailing whitespace. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 5 07:43:06 PDT 2016
Author: rksimon
Date: Sat Nov 5 09:43:04 2016
New Revision: 286034
URL: http://llvm.org/viewvc/llvm-project?rev=286034&view=rev
Log:
Strip trailing whitespace. NFCI.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=286034&r1=286033&r2=286034&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Nov 5 09:43:04 2016
@@ -21945,7 +21945,7 @@ static SDValue LowerMLOAD(SDValue Op, co
SDValue Src0 = N->getSrc0();
Src0 = ExtendToType(Src0, WideDataVT, DAG);
- // Mask element has to be i1
+ // Mask element has to be i1.
MVT MaskEltTy = Mask.getSimpleValueType().getScalarType();
assert((MaskEltTy == MVT::i1 || VT.getVectorNumElements() <= 4) &&
"We handle 4x32, 4x64 and 2x64 vectors only in this casse");
@@ -22001,7 +22001,7 @@ static SDValue LowerMSTORE(SDValue Op, c
unsigned NumEltsInWideVec = 512/VT.getScalarSizeInBits();
MVT WideDataVT = MVT::getVectorVT(ScalarVT, NumEltsInWideVec);
- // Mask element has to be i1
+ // Mask element has to be i1.
MVT MaskEltTy = Mask.getSimpleValueType().getScalarType();
assert((MaskEltTy == MVT::i1 || VT.getVectorNumElements() <= 4) &&
"We handle 4x32, 4x64 and 2x64 vectors only in this casse");
@@ -30020,7 +30020,7 @@ static SDValue combineMaskedStore(SDNode
if (Mst->isCompressingStore())
return SDValue();
-
+
if (!Mst->isTruncatingStore())
return reduceMaskedStoreToScalarStore(Mst, DAG);
@@ -32858,7 +32858,7 @@ X86TargetLowering::getRegForInlineAsmCon
return std::make_pair(0U, &X86::VK1WMRegClass);
case MVT::i64:
return std::make_pair(0U, &X86::VK64WMRegClass);
- }
+ }
}
break;
}
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