[PATCH] D26204: [llvm] FIx if-clause -Wmisleading-indentation issue.

Kirill Bobyrev via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 2 03:10:23 PDT 2016


This revision was automatically updated to reflect the committed changes.
Closed by commit rL285794: [llvm] FIx if-clause -Wmisleading-indentation issue. (authored by omtcyfz).

Changed prior to commit:
  https://reviews.llvm.org/D26204?vs=76594&id=76681#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D26204

Files:
  llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp


Index: llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
===================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
+++ llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
@@ -1174,12 +1174,13 @@
     if (!Done && S2.isReg()) {
       RegisterRef RS = S2;
       MachineInstr *RDef = getReachingDefForPred(RS, CI, RP.Reg, false);
-      if (!RDef || !HII->isPredicable(*RDef))
+      if (!RDef || !HII->isPredicable(*RDef)) {
         Done = coalesceRegisters(RD, RegisterRef(S2));
         if (Done) {
           UpdRegs.insert(RD.Reg);
           UpdRegs.insert(S2.getReg());
         }
+      }
     }
     Changed |= Done;
   }


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