[llvm] r285706 - [InstCombine] move/fix tests for adjusted min/max
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 1 09:39:30 PDT 2016
Author: spatel
Date: Tue Nov 1 11:39:30 2016
New Revision: 285706
URL: http://llvm.org/viewvc/llvm-project?rev=285706&view=rev
Log:
[InstCombine] move/fix tests for adjusted min/max
I think the former 'test50' had a typo making it functionally equivalent
to the former 'test49'; changed the predicate to provide more coverage.
Modified:
llvm/trunk/test/Transforms/InstCombine/adjust-for-minmax.ll
llvm/trunk/test/Transforms/InstCombine/select.ll
Modified: llvm/trunk/test/Transforms/InstCombine/adjust-for-minmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/adjust-for-minmax.ll?rev=285706&r1=285705&r2=285706&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/adjust-for-minmax.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/adjust-for-minmax.ll Tue Nov 1 11:39:30 2016
@@ -271,3 +271,107 @@ define <2 x i32> @umin4_vec(<2 x i32> %n
ret <2 x i32> %m
}
+define i64 @smax_sext(i32 %a) {
+; CHECK-LABEL: @smax_sext(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[A_EXT]], 0
+; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP]], i64 0, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MAX]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp sgt i32 %a, -1
+ %max = select i1 %cmp, i64 %a_ext, i64 0
+ ret i64 %max
+}
+
+define i64 @smin_sext(i32 %a) {
+; CHECK-LABEL: @smin_sext(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[A_EXT]], 0
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 0, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MIN]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp slt i32 %a, 1
+ %min = select i1 %cmp, i64 %a_ext, i64 0
+ ret i64 %min
+}
+
+define i64 @umax_sext(i32 %a) {
+; CHECK-LABEL: @umax_sext(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
+; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP]], i64 3, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MAX]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp ugt i32 %a, 2
+ %max = select i1 %cmp, i64 %a_ext, i64 3
+ ret i64 %max
+}
+
+define i64 @umin_sext(i32 %a) {
+; CHECK-LABEL: @umin_sext(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 2, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MIN]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp ult i32 %a, 3
+ %min = select i1 %cmp, i64 %a_ext, i64 2
+ ret i64 %min
+}
+
+define i64 @umax_sext2(i32 %a) {
+; CHECK-LABEL: @umax_sext2(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 2
+; CHECK-NEXT: ret i64 [[MIN]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp ult i32 %a, 3
+ %min = select i1 %cmp, i64 2, i64 %a_ext
+ ret i64 %min
+}
+
+define i64 @umin_sext2(i32 %a) {
+; CHECK-LABEL: @umin_sext2(
+; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 3
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 2, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MIN]]
+;
+ %a_ext = sext i32 %a to i64
+ %cmp = icmp ugt i32 %a, 3
+ %min = select i1 %cmp, i64 2, i64 %a_ext
+ ret i64 %min
+}
+
+define i64 @umax_zext(i32 %a) {
+; CHECK-LABEL: @umax_zext(
+; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
+; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP]], i64 3, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MAX]]
+;
+ %a_ext = zext i32 %a to i64
+ %cmp = icmp ugt i32 %a, 2
+ %max = select i1 %cmp, i64 %a_ext, i64 3
+ ret i64 %max
+}
+
+define i64 @umin_zext(i32 %a) {
+; CHECK-LABEL: @umin_zext(
+; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 %a to i64
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 2, i64 [[A_EXT]]
+; CHECK-NEXT: ret i64 [[MIN]]
+;
+ %a_ext = zext i32 %a to i64
+ %cmp = icmp ult i32 %a, 3
+ %min = select i1 %cmp, i64 %a_ext, i64 2
+ ret i64 %min
+}
+
Modified: llvm/trunk/test/Transforms/InstCombine/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select.ll?rev=285706&r1=285705&r2=285706&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select.ll Tue Nov 1 11:39:30 2016
@@ -721,110 +721,6 @@ define i32 @test42(i32 %x, i32 %y) {
; CHECK-NEXT: ret i32 %c
}
-define i64 @test43(i32 %a) {
-; CHECK-LABEL: @test43(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONNEGATIVE:%.*]] = icmp slt i64 [[A_EXT]], 0
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[IS_A_NONNEGATIVE]], i64 0, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MAX]]
-;
- %a_ext = sext i32 %a to i64
- %is_a_nonnegative = icmp sgt i32 %a, -1
- %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0
- ret i64 %max
-}
-
-define i64 @test44(i32 %a) {
-; CHECK-LABEL: @test44(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONPOSITIVE:%.*]] = icmp sgt i64 [[A_EXT]], 0
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[IS_A_NONPOSITIVE]], i64 0, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MIN]]
-;
- %a_ext = sext i32 %a to i64
- %is_a_nonpositive = icmp slt i32 %a, 1
- %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 0
- ret i64 %min
-}
-
-define i64 @test45(i32 %a) {
-; CHECK-LABEL: @test45(
-; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONNEGATIVE:%.*]] = icmp ult i64 [[A_EXT]], 3
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[IS_A_NONNEGATIVE]], i64 3, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MAX]]
-;
- %a_ext = zext i32 %a to i64
- %is_a_nonnegative = icmp ugt i32 %a, 2
- %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3
- ret i64 %max
-}
-
-define i64 @test46(i32 %a) {
-; CHECK-LABEL: @test46(
-; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONPOSITIVE:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[IS_A_NONPOSITIVE]], i64 2, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MIN]]
-;
- %a_ext = zext i32 %a to i64
- %is_a_nonpositive = icmp ult i32 %a, 3
- %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2
- ret i64 %min
-}
-
-define i64 @test47(i32 %a) {
-; CHECK-LABEL: @test47(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONNEGATIVE:%.*]] = icmp ult i64 [[A_EXT]], 3
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[IS_A_NONNEGATIVE]], i64 3, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MAX]]
-;
- %a_ext = sext i32 %a to i64
- %is_a_nonnegative = icmp ugt i32 %a, 2
- %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 3
- ret i64 %max
-}
-
-define i64 @test48(i32 %a) {
-; CHECK-LABEL: @test48(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONPOSITIVE:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[IS_A_NONPOSITIVE]], i64 2, i64 [[A_EXT]]
-; CHECK-NEXT: ret i64 [[MIN]]
-;
- %a_ext = sext i32 %a to i64
- %is_a_nonpositive = icmp ult i32 %a, 3
- %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2
- ret i64 %min
-}
-
-define i64 @test49(i32 %a) {
-; CHECK-LABEL: @test49(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONPOSITIVE:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[IS_A_NONPOSITIVE]], i64 [[A_EXT]], i64 2
-; CHECK-NEXT: ret i64 [[MIN]]
-;
- %a_ext = sext i32 %a to i64
- %is_a_nonpositive = icmp ult i32 %a, 3
- %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext
- ret i64 %min
-}
-
-define i64 @test50(i32 %a) {
-; CHECK-LABEL: @test50(
-; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT: [[IS_A_NONPOSITIVE:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[IS_A_NONPOSITIVE]], i64 [[A_EXT]], i64 2
-; CHECK-NEXT: ret i64 [[MIN]]
-;
- %is_a_nonpositive = icmp ult i32 %a, 3
- %a_ext = sext i32 %a to i64
- %min = select i1 %is_a_nonpositive, i64 2, i64 %a_ext
- ret i64 %min
-}
-
; PR8994
; This select instruction can't be eliminated because trying to do so would
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