[PATCH] D25438: [mips] Fix Mips MSA instrinsics

[Simon Dardis via llvm-commits]

sdardis added a comment.



  @v16i8_a = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
  @v16i8_r = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
  
  ; Function Attrs: nounwind
  define void @test() #0 {
  entry:
    %0 = load <16 x i8>, <16 x i8>* @v16i8_r, align 16
    %1 = load <16 x i8>, <16 x i8>* @v16i8_a, align 16
    %2 = call <16 x i8> @llvm.mips.binsri.b(<16 x i8> %0, <16 x i8> %1, i32 -1)
    store <16 x i8> %2, <16 x i8>* @v16i8_r, align 16
    ret void
  }

Although that IR should not be generated, I want to be sure that we get something out rather than a bizarre crash.


Repository:
  rL LLVM

https://reviews.llvm.org/D25438