[PATCH] D26181: RegCall - Handling v64i1 in 32/64 bit target

Oren Ben Simhon via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 1 02:45:41 PDT 2016


oren_ben_simhon created this revision.
oren_ben_simhon added reviewers: asl, rnk, baldrick, erichkeane, delena, mkuper.
oren_ben_simhon added a subscriber: llvm-commits.
oren_ben_simhon set the repository for this revision to rL LLVM.

Register Calling Convention defines a new behavior for v64i1 types.
This type should be saved in GPR.
However for 32 bit machine we need to split the value into 2 GPRs (because each is 32 bit).


Repository:
  rL LLVM

https://reviews.llvm.org/D26181

Files:
  lib/Target/X86/X86CallingConv.h
  lib/Target/X86/X86CallingConv.td
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avx512-regcall-Mask.ll

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