[PATCH] D25966: [AArch64] Lower multiplication by a constant int to shl+add+shl

[Haicheng Wu via llvm-commits]

haicheng updated this revision to Diff 76308.
haicheng added a comment.

Rewrite performMulCombine(), make the conversion a little less conservative to improve the performance and reduce the compilation time, add more tests.


Repository:
  rL LLVM

https://reviews.llvm.org/D25966

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/mul_pow2.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D25966.76308.patch
Type: text/x-patch
Size: 10847 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161029/489cd4bf/attachment.bin>