[PATCH] D25551: AMDGPU: Implement SGPR spilling with scalar stores

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 28 16:12:54 PDT 2016


arsenm updated this revision to Diff 76270.
arsenm added a comment.

Fix if offset is 0


https://reviews.llvm.org/D25551

Files:
  lib/Target/AMDGPU/SIInsertWaits.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
  test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
  test/CodeGen/AMDGPU/basic-branch.ll
  test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll
  test/CodeGen/AMDGPU/spill-m0.ll
  test/CodeGen/MIR/AMDGPU/scalar-store-cache-flush.mir

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