[llvm] r285225 - [PowerPC] Implement vec_insert_exp builtins - llvm portion
Nemanja Ivanovic via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 26 12:03:40 PDT 2016
Author: nemanjai
Date: Wed Oct 26 14:03:40 2016
New Revision: 285225
URL: http://llvm.org/viewvc/llvm-project?rev=285225&view=rev
Log:
[PowerPC] Implement vec_insert_exp builtins - llvm portion
This revision corresponds to review: https://reviews.llvm.org/D25957.
Committing on behalf of Zaara Syeda.
Modified:
llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll
Modified: llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td?rev=285225&r1=285224&r2=285225&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td Wed Oct 26 14:03:40 2016
@@ -782,6 +782,12 @@ def int_ppc_vsx_xvcmpgtsp_p : GCCBuiltin
def int_ppc_vsx_xxleqv :
PowerPC_VSX_Intrinsic<"xxleqv", [llvm_v4i32_ty],
[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
+def int_ppc_vsx_xviexpdp :
+ PowerPC_VSX_Intrinsic<"xviexpdp",[llvm_v2f64_ty],
+ [llvm_v2i64_ty, llvm_v2i64_ty],[IntrNoMem]>;
+def int_ppc_vsx_xviexpsp :
+ PowerPC_VSX_Intrinsic<"xviexpsp",[llvm_v4f32_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty],[IntrNoMem]>;
}
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td?rev=285225&r1=285224&r2=285225&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td Wed Oct 26 14:03:40 2016
@@ -2191,9 +2191,9 @@ let AddedComplexity = 400, Predicates =
// Vector Insert Exponent DP/SP
def XVIEXPDP : XX3_XT5_XA5_XB5<60, 248, "xviexpdp", vsrc, vsrc, vsrc,
- IIC_VecFP, []>;
+ IIC_VecFP, [(set v2f64: $XT,(int_ppc_vsx_xviexpdp v2i64:$XA, v2i64:$XB))]>;
def XVIEXPSP : XX3_XT5_XA5_XB5<60, 216, "xviexpsp", vsrc, vsrc, vsrc,
- IIC_VecFP, []>;
+ IIC_VecFP, [(set v4f32: $XT,(int_ppc_vsx_xviexpsp v4i32:$XA, v4i32:$XB))]>;
// Vector Extract Exponent/Significand DP/SP
def XVXEXPDP : XX2_XT6_XO5_XB6<60, 0, 475, "xvxexpdp", vsrc, []>;
Modified: llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll?rev=285225&r1=285224&r2=285225&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vsx-p9.ll Wed Oct 26 14:03:40 2016
@@ -143,4 +143,28 @@ entry:
ret void
}
+; Function Attrs: nounwind readnone
+define <4 x float> @testXVIEXPSP(<4 x i32> %a, <4 x i32> %b) {
+entry:
+ %0 = tail call <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32> %a, <4 x i32> %b)
+ ret <4 x float> %0
+; CHECK-LABEL: testXVIEXPSP
+; CHECK: xviexpsp 34, 34, 35
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32>, <4 x i32>)
+
+; Function Attrs: nounwind readnone
+define <2 x double> @testXVIEXPDP(<2 x i64> %a, <2 x i64> %b) {
+entry:
+ %0 = tail call <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64> %a, <2 x i64> %b)
+ ret <2 x double> %0
+; CHECK-LABEL: testXVIEXPDP
+; CHECK: xviexpdp 34, 34, 35
+; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64>, <2 x i64>)
+
declare void @sink(...)
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