[PATCH] D25699: LegalizeDAG: Support promoting [US]DIV and [US]REM operations

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL285199: LegalizeDAG: Support promoting [US]DIV and [US]REM operations (authored by tstellar).

Changed prior to commit:
  https://reviews.llvm.org/D25699?vs=74903&id=75894#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D25699

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp


Index: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4148,6 +4148,10 @@
     ReplacedNode(Node);
     break;
   }
+  case ISD::SDIV:
+  case ISD::SREM:
+  case ISD::UDIV:
+  case ISD::UREM:
   case ISD::AND:
   case ISD::OR:
   case ISD::XOR: {
@@ -4157,7 +4161,20 @@
       TruncOp = ISD::BITCAST;
     } else {
       assert(OVT.isInteger() && "Cannot promote logic operation");
-      ExtOp   = ISD::ANY_EXTEND;
+
+      switch (Node->getOpcode()) {
+      default:
+        ExtOp = ISD::ANY_EXTEND;
+        break;
+      case ISD::SDIV:
+      case ISD::SREM:
+        ExtOp = ISD::SIGN_EXTEND;
+        break;
+      case ISD::UDIV:
+      case ISD::UREM:
+        ExtOp = ISD::ZERO_EXTEND;
+        break;
+      }
       TruncOp = ISD::TRUNCATE;
     }
     // Promote each of the values to the new type.


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D25699.75894.patch
Type: text/x-patch
Size: 1003 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161026/a44a53d6/attachment.bin>