[llvm] r285077 - [SystemZ] Do not use LOC(G) for volatile loads
Ulrich Weigand via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 25 08:39:15 PDT 2016
Author: uweigand
Date: Tue Oct 25 10:39:15 2016
New Revision: 285077
URL: http://llvm.org/viewvc/llvm-project?rev=285077&view=rev
Log:
[SystemZ] Do not use LOC(G) for volatile loads
It is not safe to use LOAD ON CONDITION to implement access to a memory
location marked "volatile", since the architecture leaves it unspecified
whether or not an access happens if the condition is false.
The current code already appears to care about that:
def LOC : CondUnaryRSY<"loc", 0xEBF2, nonvolatile_load, GR32, 4>;
Unfortunately, that "nonvolatile_load" operator is simply ignored
by the CondUnaryRSY class, and there was no test to catch it.
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
llvm/trunk/test/CodeGen/SystemZ/cond-load-01.ll
llvm/trunk/test/CodeGen/SystemZ/cond-load-02.ll
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td?rev=285077&r1=285076&r2=285077&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td Tue Oct 25 10:39:15 2016
@@ -1665,7 +1665,7 @@ class CondUnaryRSY<string mnemonic, bits
(ins cls:$R1src, mode:$BD2, cond4:$valid, cond4:$R3),
mnemonic#"$R3\t$R1, $BD2",
[(set cls:$R1,
- (z_select_ccmask (load bdaddr20only:$BD2), cls:$R1src,
+ (z_select_ccmask (operator bdaddr20only:$BD2), cls:$R1src,
cond4:$valid, cond4:$R3))]>,
Requires<[FeatureLoadStoreOnCond]> {
let Constraints = "$R1 = $R1src";
Modified: llvm/trunk/test/CodeGen/SystemZ/cond-load-01.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/cond-load-01.ll?rev=285077&r1=285076&r2=285077&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-load-01.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/cond-load-01.ll Tue Oct 25 10:39:15 2016
@@ -128,3 +128,17 @@ exit:
%res = phi i32 [ %easy, %entry ], [ %other, %load ]
ret i32 %res
}
+
+; Test that volatile loads do not use LOC, since if the condition is false,
+; it is unspecified whether or not the load happens. LOCR is fine though.
+define i32 @f10(i32 %easy, i32 *%ptr, i32 %limit) {
+; CHECK-LABEL: f10:
+; CHECK: l {{%r[0-9]*}}, 0(%r3)
+; CHECK: locr
+; CHECK: br %r14
+ %cond = icmp ult i32 %limit, 42
+ %other = load volatile i32, i32 *%ptr
+ %res = select i1 %cond, i32 %easy, i32 %other
+ ret i32 %res
+}
+
Modified: llvm/trunk/test/CodeGen/SystemZ/cond-load-02.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/cond-load-02.ll?rev=285077&r1=285076&r2=285077&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-load-02.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/cond-load-02.ll Tue Oct 25 10:39:15 2016
@@ -128,3 +128,17 @@ exit:
%res = phi i64 [ %easy, %entry ], [ %other, %load ]
ret i64 %res
}
+
+; Test that volatile loads do not use LOCG, since if the condition is false,
+; it is unspecified whether or not the load happens. LOCGR is fine though.
+define i64 @f10(i64 %easy, i64 *%ptr, i64 %limit) {
+; CHECK-LABEL: f10:
+; CHECK: lg {{%r[0-9]*}}, 0(%r3)
+; CHECK: locgr
+; CHECK: br %r14
+ %cond = icmp ult i64 %limit, 42
+ %other = load volatile i64, i64 *%ptr
+ %res = select i1 %cond, i64 %easy, i64 %other
+ ret i64 %res
+}
+
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