[PATCH] D25691: [DAGCombiner] Add vector demanded elements support to computeKnownBits

[Zvi Rackover via llvm-commits]

zvi added a comment.

In https://reviews.llvm.org/D25691#572643, @RKSimon wrote:

> I'll investigate the InstCombine version - I don't know as much about the value tracking code so it might take a little longer.


At the moment, instcombine can't handle cases such as:

  define <4 x i32> @all_zeros_1(i32 %a) {
    %u = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %a, i32 0
    %l = and <4 x i32> %u, <i32 0, i32 -1, i32 -1, i32 -1>
    ret <4 x i32> %l
  }

or

  define <4 x i32> @redundant_and(i32 %a) {
    %u = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %a, i32 0
    %l = and <4 x i32> %u, <i32 -1, i32 0, i32 0, i32 0>
    ret <4 x i32> %l
  }

It would be nice if both instcombine and dagcombine shared the same DemandedBits infrastructure, though i don't have a plan to achieve this.


Repository:
  rL LLVM

https://reviews.llvm.org/D25691