[llvm] r284916 - [X86] Apply the Update LLC Test Checks tool on the mmx-bitcast test

[Zvi Rackover via llvm-commits]

Author: zvi
Date: Sat Oct 22 02:15:00 2016
New Revision: 284916

URL: http://llvm.org/viewvc/llvm-project?rev=284916&view=rev
Log:
[X86] Apply the Update LLC Test Checks tool on the mmx-bitcast test

Modified:
    llvm/trunk/test/CodeGen/X86/mmx-bitcast.ll

Modified: llvm/trunk/test/CodeGen/X86/mmx-bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-bitcast.ll?rev=284916&r1=284915&r2=284916&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-bitcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-bitcast.ll Sat Oct 22 02:15:00 2016
@@ -1,9 +1,10 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
 
 define i64 @t0(x86_mmx* %p) {
 ; CHECK-LABEL: t0:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movq
+; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddq %mm0, %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
 ; CHECK-NEXT:    retq
@@ -16,7 +17,7 @@ define i64 @t0(x86_mmx* %p) {
 define i64 @t1(x86_mmx* %p) {
 ; CHECK-LABEL: t1:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movq
+; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddd %mm0, %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
 ; CHECK-NEXT:    retq
@@ -29,7 +30,7 @@ define i64 @t1(x86_mmx* %p) {
 define i64 @t2(x86_mmx* %p) {
 ; CHECK-LABEL: t2:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movq
+; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddw %mm0, %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
 ; CHECK-NEXT:    retq
@@ -42,7 +43,7 @@ define i64 @t2(x86_mmx* %p) {
 define i64 @t3(x86_mmx* %p) {
 ; CHECK-LABEL: t3:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movq
+; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddb %mm0, %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
 ; CHECK-NEXT:    retq
@@ -57,9 +58,13 @@ define i64 @t3(x86_mmx* %p) {
 define void @t4(<1 x i64> %A, <1 x i64> %B) {
 ; CHECK-LABEL: t4:
 ; CHECK:       ## BB#0: ## %entry
-; CHECK-NEXT:    movd
-; CHECK-NEXT:    movd
-; CHECK:    retq
+; CHECK-NEXT:    movd %rdi, %mm0
+; CHECK-NEXT:    movd %rsi, %mm1
+; CHECK-NEXT:    paddusw %mm0, %mm1
+; CHECK-NEXT:    movq _R@{{.*}}(%rip), %rax
+; CHECK-NEXT:    movq %mm1, (%rax)
+; CHECK-NEXT:    emms
+; CHECK-NEXT:    retq
 entry:
   %tmp2 = bitcast <1 x i64> %A to x86_mmx
   %tmp3 = bitcast <1 x i64> %B to x86_mmx
@@ -72,8 +77,8 @@ entry:
 define i64 @t5(i32 %a, i32 %b) nounwind readnone {
 ; CHECK-LABEL: t5:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movd
-; CHECK-NEXT:    movd
+; CHECK-NEXT:    movd %esi, %xmm0
+; CHECK-NEXT:    movd %edi, %xmm1
 ; CHECK-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
 ; CHECK-NEXT:    movd %xmm1, %rax
 ; CHECK-NEXT:    retq
@@ -88,7 +93,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x8
 define <1 x i64> @t6(i64 %t) {
 ; CHECK-LABEL: t6:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    movd
+; CHECK-NEXT:    movd %rdi, %mm0
 ; CHECK-NEXT:    psllq $48, %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
 ; CHECK-NEXT:    retq