[PATCH] D25699: LegalizeDAG: Support promoting [US]DIV and [US]REM operations

[Justin Bogner via llvm-commits]

Tom Stellard <thomas.stellard at amd.com> writes:
> tstellarAMD created this revision.
> tstellarAMD added a reviewer: bogner.
> tstellarAMD added a subscriber: llvm-commits.
> Herald added a subscriber: wdng.
>
> AMDGPU will need this one i16 is added as a legal type.  This is tested by:
>
> test/CodeGen/AMDGPU/sdiv.ll
> test/CodeGen/AMDGPU/sdivrem24.ll
> test/CodeGen/AMDGPU/udiv.ll
> test/CodeGen/AMDGPU/udivrem24.ll

I assume you mean "This will be tested by..." once i16 is added as a
legal type in AMDGPU, right?

> https://reviews.llvm.org/D25699
>
> Files:
>   lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>
>
> Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> +++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> @@ -4131,6 +4131,10 @@
>      ReplacedNode(Node);
>      break;
>    }
> +  case ISD::SDIV:
> +  case ISD::SREM:
> +  case ISD::UDIV:
> +  case ISD::UREM:
>    case ISD::AND:
>    case ISD::OR:
>    case ISD::XOR: {
> @@ -4140,7 +4144,20 @@
>        TruncOp = ISD::BITCAST;
>      } else {
>        assert(OVT.isInteger() && "Cannot promote logic operation");
> -      ExtOp   = ISD::ANY_EXTEND;
> +
> +      switch (Node->getOpcode()) {
> +      default:
> +        ExtOp = ISD::ANY_EXTEND;
> +        break;
> +      case ISD::SDIV:
> +      case ISD::SREM:
> +        ExtOp = ISD::SIGN_EXTEND;
> +        break;
> +      case ISD::UDIV:
> +      case ISD::UREM:
> +        ExtOp = ISD::ZERO_EXTEND;
> +        break;
> +      }
>        TruncOp = ISD::TRUNCATE;
>      }
>      // Promote each of the values to the new type.
>
>