[llvm] r284857 - [RDF] Use RegisterId typedef more consistently, NFC

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Fri Oct 21 14:12:13 2016
New Revision: 284857

URL: http://llvm.org/viewvc/llvm-project?rev=284857&view=rev
Log:
[RDF] Use RegisterId typedef more consistently, NFC

Modified:
    llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp
    llvm/trunk/lib/Target/Hexagon/RDFGraph.h
    llvm/trunk/lib/Target/Hexagon/RDFLiveness.h

Modified: llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp?rev=284857&r1=284856&r2=284857&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp Fri Oct 21 14:12:13 2016
@@ -630,7 +630,7 @@ bool TargetOperandInfo::isFixedReg(const
   // uses or defs, and those lists do not allow sub-registers.
   if (Op.getSubReg() != 0)
     return false;
-  uint32_t Reg = Op.getReg();
+  RegisterId Reg = Op.getReg();
   const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs()
                                      : D.getImplicitUses();
   if (!ImpR)
@@ -643,7 +643,7 @@ bool TargetOperandInfo::isFixedReg(const
 
 
 RegisterRef RegisterAggr::normalize(RegisterRef RR) const {
-  uint32_t SuperReg = RR.Reg;
+  RegisterId SuperReg = RR.Reg;
   while (true) {
     MCSuperRegIterator SR(SuperReg, &TRI, false);
     if (!SR.isValid())
@@ -706,7 +706,7 @@ RegisterAggr &RegisterAggr::insert(Regis
 }
 
 RegisterAggr &RegisterAggr::insert(const RegisterAggr &RG) {
-  for (std::pair<uint32_t,LaneBitmask> P : RG.Masks)
+  for (std::pair<RegisterId,LaneBitmask> P : RG.Masks)
     insert(RegisterRef(P.first, P.second));
   return *this;
 }
@@ -725,7 +725,7 @@ RegisterAggr &RegisterAggr::clear(Regist
 }
 
 RegisterAggr &RegisterAggr::clear(const RegisterAggr &RG) {
-  for (std::pair<uint32_t,LaneBitmask> P : RG.Masks)
+  for (std::pair<RegisterId,LaneBitmask> P : RG.Masks)
     clear(RegisterRef(P.first, P.second));
   return *this;
 }
@@ -850,7 +850,7 @@ unsigned DataFlowGraph::DefStack::nextDo
 // Register information.
 
 // Get the list of references aliased to RR. Lane masks are ignored.
-RegisterSet DataFlowGraph::getAliasSet(uint32_t Reg) const {
+RegisterSet DataFlowGraph::getAliasSet(RegisterId Reg) const {
   // Do not include RR in the alias set.
   RegisterSet AS;
   assert(TargetRegisterInfo::isPhysicalRegister(Reg));
@@ -866,9 +866,9 @@ RegisterSet DataFlowGraph::getLandingPad
   const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn()
                                             : nullptr;
   const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
-  if (uint32_t R = TLI.getExceptionPointerRegister(PF))
+  if (RegisterId R = TLI.getExceptionPointerRegister(PF))
     LR.insert(RegisterRef(R));
-  if (uint32_t R = TLI.getExceptionSelectorRegister(PF))
+  if (RegisterId R = TLI.getExceptionSelectorRegister(PF))
     LR.insert(RegisterRef(R));
   return LR;
 }
@@ -1072,7 +1072,7 @@ RegisterRef DataFlowGraph::makeRegRef(un
 
 RegisterRef DataFlowGraph::normalizeRef(RegisterRef RR) const {
   // FIXME copied from RegisterAggr
-  uint32_t SuperReg = RR.Reg;
+  RegisterId SuperReg = RR.Reg;
   while (true) {
     MCSuperRegIterator SR(SuperReg, &TRI, false);
     if (!SR.isValid())

Modified: llvm/trunk/lib/Target/Hexagon/RDFGraph.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFGraph.h?rev=284857&r1=284856&r2=284857&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFGraph.h (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFGraph.h Fri Oct 21 14:12:13 2016
@@ -790,7 +790,7 @@ namespace rdf {
 
     // Make this std::unordered_map for speed of accessing elements.
     // Map: Register (physical or virtual) -> DefStack
-    typedef std::unordered_map<uint32_t,DefStack> DefStackMap;
+    typedef std::unordered_map<RegisterId,DefStack> DefStackMap;
 
     void build(unsigned Options = BuildOptions::None);
     void pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM);
@@ -863,7 +863,7 @@ namespace rdf {
   private:
     void reset();
 
-    RegisterSet getAliasSet(uint32_t Reg) const;
+    RegisterSet getAliasSet(RegisterId Reg) const;
     RegisterSet getLandingPadLiveIns() const;
 
     NodeAddr<NodeBase*> newNode(uint16_t Attrs);

Modified: llvm/trunk/lib/Target/Hexagon/RDFLiveness.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFLiveness.h?rev=284857&r1=284856&r2=284857&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFLiveness.h (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFLiveness.h Fri Oct 21 14:12:13 2016
@@ -103,7 +103,8 @@ namespace rdf {
 
     // Phi information:
     //
-    // map: NodeId -> (map: RegisterRef -> NodeSet)
+    // RealUseMap
+    // map: NodeId -> (map: RegisterId -> NodeRefSet)
     //      phi id -> (map: register -> set of reached non-phi uses)
     std::map<NodeId, RefMap> RealUseMap;