[PATCH] D25849: [GVN] Prevent load coercion with irregular vector types
Davide Italiano via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 20 17:33:36 PDT 2016
davide updated this revision to Diff 75379.
davide added a comment.
Yes, it's alignTo (didn't look at MathExtras.h before this commit, sorry =)). Reordered the check. Does it look OK to you?
BTW, RKSimon gave LGTM offline (forgot to mention).
https://reviews.llvm.org/D25849
Files:
lib/Transforms/Scalar/GVN.cpp
test/Transforms/GVN/i7vector.ll
Index: test/Transforms/GVN/i7vector.ll
===================================================================
--- /dev/null
+++ test/Transforms/GVN/i7vector.ll
@@ -0,0 +1,16 @@
+; RUN: opt -gvn %s -S -o -
+
+define void @f() {
+entry:
+ %a = alloca <7 x i1>, align 2
+ store <7 x i1> undef, <7 x i1>* %a, align 2
+ %0 = getelementptr inbounds <7 x i1>, <7 x i1>* %a, i64 0, i64 0
+ %val = load i1, i1* %0, align 2
+ br i1 %val, label %cond.true, label %cond.false
+
+cond.true:
+ ret void
+
+cond.false:
+ ret void
+}
Index: lib/Transforms/Scalar/GVN.cpp
===================================================================
--- lib/Transforms/Scalar/GVN.cpp
+++ lib/Transforms/Scalar/GVN.cpp
@@ -713,9 +713,16 @@
StoredVal->getType()->isArrayTy())
return false;
+ uint64_t StoreSize = DL.getTypeSizeInBits(StoredVal->getType());
+
+ // Prevent load coercion with irregular vector types (e.g. <7 x i1>).
+ // Other parts of the code don't deal with them very well and we're
+ // going to crash later anyway.
+ if (llvm::alignTo(StoreSize, 8) != StoreSize)
+ return false;
+
// The store has to be at least as big as the load.
- if (DL.getTypeSizeInBits(StoredVal->getType()) <
- DL.getTypeSizeInBits(LoadTy))
+ if (StoreSize < DL.getTypeSizeInBits(LoadTy))
return false;
return true;
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