[PATCH] D25815: [AMDGPU] Handle R_AMDGPU_ABS64 relocation

[Konstantin Zhuravlyov via llvm-commits]

kzhuravl created this revision.
kzhuravl added reviewers: tstellarAMD, ruiu, rafael.
kzhuravl added a subscriber: llvm-commits.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng.

This is needed for the following case (OpenCL example):

  __global int Var = 0; 
  __global int* Ptr[] = {&Var}; 
  ...


https://reviews.llvm.org/D25815

Files:
  ELF/Target.cpp
  test/ELF/amdgpu-relocs.s


Index: test/ELF/amdgpu-relocs.s
===================================================================
--- test/ELF/amdgpu-relocs.s
+++ test/ELF/amdgpu-relocs.s
@@ -5,7 +5,7 @@
 
 # REQUIRES: amdgpu
 
-  .text
+.text
 
 kernel0:
   s_mov_b32 s0, common_var0 at GOTPCREL+4
@@ -50,11 +50,21 @@
   .local   local_var1
   .local   local_var2
 
+# R_AMDGPU_ABS32:
 .section nonalloc, "w", @progbits
   .long var0, common_var2+4
   .long var1, common_var1+8
   .long var2, common_var0+12
 
+# R_AMDGPU_ABS64:
+.type ptr, @object
+.data
+  .globl ptr
+  .p2align 3
+ptr:
+  .quad temp
+  .size ptr, 8
+
 # The relocation for local_var{0, 1, 2} and var should be resolved by the
 # linker.
 # CHECK: Relocations [
@@ -68,6 +78,7 @@
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var2 0x0
+# CHECK-NEXT: R_AMDGPU_ABS64 temp 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var2 0x0
@@ -78,5 +89,5 @@
 # CHECK-NEXT: ]
 
 # OBJDUMP: Contents of section nonalloc:
-# OBJDUMP-NEXT: 0000 00000000 04380000 00000000 08340000
-# OBJDUMP-NEXT: 00000000 0c300000
+# OBJDUMP-NEXT: 0000 00000000 14380000 00000000 18340000
+# OBJDUMP-NEXT: 00000000 1c300000
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -1488,14 +1488,18 @@
   case R_AMDGPU_REL32_HI:
     write32le(Loc, Val >> 32);
     break;
+  case R_AMDGPU_ABS64:
+    write64le(Loc, Val);
+    break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
   switch (Type) {
   case R_AMDGPU_ABS32:
+  case R_AMDGPU_ABS64:
     return R_ABS;
   case R_AMDGPU_REL32:
   case R_AMDGPU_REL32_LO:


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