[PATCH] D25759: [AVX512][llvm] Adding missing instructions' variations

[Craig Topper via llvm-commits]

craig.topper added a comment.

I think this patch should really be split up into separate pieces. The multishift part is unrelated to the rest.

Also the Intel docs say zero masking for store instructions is a UD fault and not supported so I'm not sure the rest of this patch is correct.


Repository:
  rL LLVM

https://reviews.llvm.org/D25759