[PATCH] D24808: [AArch64] Avoid materializing 0.0 when generating FP CSEL

Tue Oct 18 12:47:41 PDT 2016

rengolin accepted this revision.
rengolin added a reviewer: rengolin.
rengolin added a comment.
This revision is now accepted and ready to land.

In https://reviews.llvm.org/D24808#573411, @evandro wrote:

> I think that it answers both questions.

Well, that, and the fact that there's a special zero variant for fpcmp that I just found out. :)

I agree this is at least a place as good as any. I'm not sure how this could be done at the DAGCombiner level, being such target-specific transformation.

LGTM. Thanks!

Repository:
  rL LLVM

https://reviews.llvm.org/D24808